From ae10ce938da59c19f303a91197ea7d664d1bc080 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 20 Jan 2021 13:51:45 -0600 Subject: [PATCH] arm64: dts: ti: k3*: Fixup PMU compatibility to be CPU specific We can use CPU specific pmu configuration to expose the appropriate CPU specific events rather than just the basic generic pmuv3 perf events. Reported-by: Sudeep Holla Signed-off-by: Nishanth Menon Tested-by: Suman Anna Reviewed-by: Tero Kristo Link: https://lore.kernel.org/r/20210120195145.32259-1-nm@ti.com --- arch/arm64/boot/dts/ti/k3-am65.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-j7200.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index d84c0bc05023..a9fc1af03f27 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -56,7 +56,7 @@ }; pmu: pmu { - compatible = "arm,armv8-pmuv3"; + compatible = "arm,cortex-a53-pmu"; /* Recommendation from GIC500 TRM Table A.3 */ interrupts = ; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi index 66169bcf7c9a..b7005b803149 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -114,7 +114,7 @@ }; pmu: pmu { - compatible = "arm,armv8-pmuv3"; + compatible = "arm,cortex-a72-pmu"; interrupts = ; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index cc483f7344af..f0587fde147e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -115,7 +115,7 @@ }; pmu: pmu { - compatible = "arm,armv8-pmuv3"; + compatible = "arm,cortex-a72-pmu"; /* Recommendation from GIC500 TRM Table A.3 */ interrupts = ; }; -- 2.39.2