From d40bfb0dc0e397fe08c37789729f3ce26cb19dc2 Mon Sep 17 00:00:00 2001 From: Xiaofei Tan Date: Tue, 24 Oct 2017 23:51:43 +0800 Subject: [PATCH] scsi: hisi_sas: init connect cfg register for v3 hw Add initialization of register CON_CFG_DRIVER for v3 hw, to limit number of the times of setup connection. Signed-off-by: Xiaofei Tan Signed-off-by: John Garry Signed-off-by: Martin K. Petersen --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index c88e787325bb..5fbd121cedb3 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -135,6 +135,7 @@ #define RX_IDAF_DWORD0 (PORT_BASE + 0xc4) #define RXOP_CHECK_CFG_H (PORT_BASE + 0xfc) #define STP_LINK_TIMER (PORT_BASE + 0x120) +#define CON_CFG_DRIVER (PORT_BASE + 0x130) #define SAS_SSP_CON_TIMER_CFG (PORT_BASE + 0x134) #define SAS_SMP_CON_TIMER_CFG (PORT_BASE + 0x138) #define SAS_STP_CON_TIMER_CFG (PORT_BASE + 0x13c) @@ -422,6 +423,8 @@ static void init_reg_v3_hw(struct hisi_hba *hisi_hba) 0xa03e8); hisi_sas_phy_write32(hisi_hba, i, STP_LINK_TIMER, 0x7f7a120); + hisi_sas_phy_write32(hisi_hba, i, CON_CFG_DRIVER, + 0x2a0a80); } for (i = 0; i < hisi_hba->queue_count; i++) { /* Delivery queue */ -- 2.39.5