From e17a512a18c1f1dece8c3d4f9685c581052d3191 Mon Sep 17 00:00:00 2001 From: Jack Xiao Date: Mon, 6 May 2019 16:35:41 +0800 Subject: [PATCH] drm/amdgpu: RLC must be disabled after SMU when S3 on navi SMU requires to interact with RLC when disable all features, so RLC shouldn't be disabled ahead of SMU. Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 +--- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 4 ++++ 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index f9ad98889c7d..80b100caf628 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -1573,8 +1573,6 @@ void gfx_v10_0_rlc_stop(struct amdgpu_device *adev) tmp = REG_SET_FIELD(tmp, RLC_CNTL, RLC_ENABLE_F32, 0); WREG32_SOC15(GC, 0, mmRLC_CNTL, tmp); - - gfx_v10_0_enable_gui_idle_interrupt(adev, false); } static void gfx_v10_0_rlc_reset(struct amdgpu_device *adev) @@ -3607,7 +3605,7 @@ static int gfx_v10_0_hw_fini(void *handle) return 0; } gfx_v10_0_cp_enable(adev, false); - gfx_v10_0_rlc_stop(adev); + gfx_v10_0_enable_gui_idle_interrupt(adev, false); return 0; } diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index 9e0b439b41ca..30dae7ca19c4 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -943,6 +943,10 @@ static int smu_suspend(void *handle) smu->watermarks_bitmap &= ~(WATERMARKS_LOADED); + if (adev->asic_type >= CHIP_NAVI10 && + adev->gfx.rlc.funcs->stop) + adev->gfx.rlc.funcs->stop(adev); + return 0; } -- 2.39.5