From f0846b24b678920e242e5c22f406719e203e2eb5 Mon Sep 17 00:00:00 2001 From: Hawking Zhang Date: Tue, 23 May 2017 18:26:14 +0800 Subject: [PATCH] drm/amd/powerplay: using MinFClock/MaxFclock to report Min/Max memory clock limits Signed-off-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c index 75cede8bd8d5..8bbccd49290b 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c @@ -782,6 +782,7 @@ static int rv_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_p struct rv_hwmgr *data; uint32_t level_index; uint32_t i; + uint32_t vol_dep_record_index = 0; if (level == NULL || hwmgr == NULL || state == NULL) return -EINVAL; @@ -801,6 +802,13 @@ static int rv_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_p } } + if (level_index == 0) { + vol_dep_record_index = data->clock_vol_info.vdd_dep_on_fclk->count - 1; + level->memory_clock = + data->clock_vol_info.vdd_dep_on_fclk->entries[vol_dep_record_index].clk; + } else + level->memory_clock = data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk; + level->nonLocalMemoryFreq = 0; level->nonLocalMemoryWidth = 0; -- 2.39.5