From f977e6500a3c8d0d9d986c1b5be0cf495edc5500 Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Mon, 9 Nov 2015 13:27:36 +0000 Subject: [PATCH] ArmCacheMaintenanceLib: disallow whole D-cache maintenance operations The ARM architecture provides no reliable way to clean or invalidate the entire data cache at runtime. The reason is that such maintenance requires the use of set/way maintenance operations, which are suitable only for the kind of maintenance that is carried out when the cache is taken offline entirely. So ASSERT () when any of the CacheMaintenanceLib whole data cache routines are invoked rather than pretending we can do anything meaningful here. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18756 6f19259b-4bc3-4df7-8a09-765794883524 --- .../ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c index d4c16a6074..65ba8749e7 100644 --- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c +++ b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c @@ -14,6 +14,7 @@ **/ #include #include +#include #include VOID @@ -44,7 +45,6 @@ InvalidateInstructionCache ( VOID ) { - ArmCleanDataCache(); ArmInvalidateInstructionCache(); } @@ -54,7 +54,7 @@ InvalidateDataCache ( VOID ) { - ArmInvalidateDataCache(); + ASSERT (FALSE); } VOID * @@ -75,7 +75,7 @@ WriteBackInvalidateDataCache ( VOID ) { - ArmCleanInvalidateDataCache(); + ASSERT (FALSE); } VOID * @@ -95,7 +95,7 @@ WriteBackDataCache ( VOID ) { - ArmCleanDataCache(); + ASSERT (FALSE); } VOID * -- 2.39.2