UefiCpuPkg: Supporting S3 in 64bit PEI https://bugzilla.tianocore.org/show_bug.cgi?id=4195 1.Updated the GDT table in VTF0 to align with the one in S3Resume2Pei. By doing so can simplify the changes to enable S3 in 64bit PEI. 2.Use SwitchStack() between PEI and SMM in S3 resume path when both are in the same execution mode. 3.Transfer from PEI to OS waking vector by calling SwitchStack() when both are in the same execution mode. 4.Removed the debug assertion in S3Resume.c to support 64bit PEI. Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Cc: Chinni B Duggapu <chinni.b.duggapu@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com>
UefiCpuPkg: Apply uncrustify changes REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiCpuPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
UefiCpuPkg: Change use of EFI_D_* to DEBUG_* REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739 Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
UefiCpuPkg: Remove PcdFrameworkCompatibilitySupport usage REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1464 Currently Framework compatibility support is not needed and PcdFrameworkCompatibilitySupport will be removed from edk2. So remove the usage of this PCD firstly. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
UefiCpuPkg: Replace BSD License with BSD+Patent License https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
UefiCpuPkg/S3Resume2Pei: check 64BIT_WAKE_F in FACS.OSPMFlags. ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) In above code, Facs->OspmFlags should be used instead. EFI_ACPI_4_0_OSPM_64BIT_WAKE__F is a bit in OSPM Enabled Firmware Control Structure Flags field, not in Firmware Control Structure Feature Flags. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1430 Cc: Aleksiy <oleksiyy@ami.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
UefiCpuPkg/S3Resume2Pei: disable paging before creating new page table. V5: 1. Add ASSERT to indicate this assumption that environment is 32 bit mode. 2. Add description in INF about this driver's expected result in different environment. V4: Only disable paging when it is enabled. V3 changes: No need to change inf file. V2 changes: Only disable paging in 32 bit mode, no matter it is enable or not. V1 changes: PEI Stack Guard needs to enable paging. This might cause #GP if code trying to write CR3 register with PML4 page table while the processor is enabled with PAE paging. Simply disabling paging before updating CR3 can solve this conflict. It's an regression caused by change: 0a0d5296e448fc350de1594c49b9c0deff7fad60 BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1232 Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jian J Wang <jian.j.wang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
UefiCpuPkg: Remove redundant library classes, Ppis and GUIDs Some redundant library classes Ppis and GUIDs have been removed in inf, .c and .h files. v2: 1.Remove ReadOnlyVariable2.h in S3Resume.c which should be deleted in last version in which gEfiPeiReadOnlyVariable2PpiGuid was removed. 2.Remove the library class BaseLib in CpuPageTable.c which is included elsewhere. 3.Add library classes in SecCore.inf which are removed at last version. They are DebugAgentLib and CpuExceptionHandlerLib. 4.Add two Ppis in SecCore.inf which are removed at last version. They are gEfiSecPlatformInformationPpiGuid and gEfiSecPlatformInformation2PpiGuid. https://bugzilla.tianocore.org/show_bug.cgi?id=1043 https://bugzilla.tianocore.org/show_bug.cgi?id=1013 https://bugzilla.tianocore.org/show_bug.cgi?id=1032 https://bugzilla.tianocore.org/show_bug.cgi?id=1016 Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei <shenglei.zhang@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
UefiCpuPkg: Use new added Perf macros Replace old Perf macros with the new added ones. Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
UefiCpuPkg S3ResumePei: Signal S3SmmInitDone Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
UefiCpuPkg/S3Resume: Remove useless perf code V2: Just update the commit message to reference the hash value of new performance infrastructure. Our new performance infrastructure (edk2 trunk commit hash value: SHA-1: 73fef64f14d1b97ae9bd4705df3becc022391eba ~ SHA-1: 115eae650bfd2be2c2bc37360f4a755065e774c4)can support to dump performance date form ACPI table in OS. So we can remove the old perf code to write performance data to OS. Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
UefiCpuPkg/S3Resume: Add more perf entry for S3 phase V2: Just update the commit message. Add more perf entry to hook BootScriptDonePpi/EndOfPeiPpi/ EndOfS3Resume. Add the new perf entry with Identifier PERF_INMODULE_START_ID/PERF_INMODULE_END_ID which are defined in new performance infrastructure (edk2 trunk commit hash value: SHA-1: 73fef64f14d1b97ae9bd4705df3becc022391eba ~ SHA-1: 115eae650bfd2be2c2bc37360f4a755065e774c4). PERF_INMODULE_START_ID/PERF_INMODULE_END_ID are general Identifier which are used within a module. Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
MdeModulePkg: Rename SmmEndOfS3ResumeProtocolGuid to EndOfS3ResumeGuid Rename SmmEndOfS3ResumeProtocolGuid to EndOfS3ResumeGuid as the GUID may be used to install PPI in future to notify PEI phase code. The references in UefiCpuPkg are also being updated. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
UefiCpuPkg/S3Resume2Pei: Handle Communicate Ppi not exist issue. Current code assume Communicate Ppi always existed, so it adds ASSERT to confirm it. Ovmf platform happened not has this Ppi, so the ASSERT been trig. This patch handle Ppi not existed case. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
UefiCpuPkg/S3Resume2Pei: Send S3 resume finished event to SmmCore. Driver will send S3 resume finished event to SmmCore through communicate buffer after it signals EndOfPei event. V2 Changes: 1. Change structures name to avoid they start with EFI_. 2. Base on DXE phase bits to provide communication buffer, current implement check both PEI and DXE phase. V3 Changes: 1. Change structure name for better understanding. 2. Enhance communication buffer calculate logic to more accurate. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
UefiCpuPkg: Error Level is not used correctly Cc: Feng Tian <feng.tian@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
UefiCpuPkg/Universal/Acpi/S3Resume2Pei: Add support for PCD PcdPteMemoryEncryptionAddressOrMask This PCD holds the address mask for page table entries when memory encryption is enabled on AMD processors supporting the Secure Encrypted Virtualization (SEV) feature. The mask is applied when page tables are created (S3Resume.c). CC: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran <leo.duran@amd.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
UefiCpuPkg: Display new stack base and size Dump new stack base and size information could help developer to narrow down stack crash issue. Cc: Feng Tian <feng.tian@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
UefiCpuPkg: Fix typos in comments - excute -> execute - Retrive -> Retrieve - possilbe -> possible - CONTINOUS -> CONTINUOUS - storgage -> storage - allcated -> allocated - triggerred -> triggered - paramter -> parameter - perodically -> periodically - retore -> restore v2: - ruturn -> return Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>