projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 23b01c83 RC |
1 | //\r |
| 2 | // Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r | |
| 3 | //\r | |
| 4 | // This program and the accompanying materials\r | |
| 5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
| 6 | // which accompanies this distribution. The full text of the license may be found at\r | |
| 7 | // http://opensource.org/licenses/bsd-license.php\r | |
| 8 | //\r | |
| 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 11 | //\r | |
| 12 | //\r | |
| 13 | \r | |
| 14 | \r | |
| 15 | /* Secondary core pens for AArch64 Linux booting.\r | |
| 16 | \r | |
| 17 | This code it placed in Linux kernel memory and marked reserved. UEFI ensures\r | |
| 18 | that the secondary cores get to this pen and the kernel can then start the\r | |
| 19 | cores from here.\r | |
| 20 | NOTE: This code must be self-contained.\r | |
| 21 | */\r | |
| 22 | \r | |
| 23 | #include <Library/ArmLib.h>\r | |
| 24 | \r | |
| 25 | .text\r | |
| 26 | .align 3\r | |
| 27 | \r | |
| 28 | GCC_ASM_EXPORT(SecondariesPenStart)\r | |
| 29 | ASM_GLOBAL SecondariesPenEnd\r | |
| 30 | \r | |
| 31 | ASM_PFX(SecondariesPenStart):\r | |
| 32 | // Registers x0-x3 are reserved for future use and should be set to zero.\r | |
| 33 | mov x0, xzr\r | |
| 34 | mov x1, xzr\r | |
| 35 | mov x2, xzr\r | |
| 36 | mov x3, xzr\r | |
| 37 | \r | |
| 38 | // Get core position. Taken from ArmPlatformGetCorePosition().\r | |
| 39 | // Assumes max 4 cores per cluster.\r | |
| 40 | mrs x4, mpidr_el1 // Get MPCore register.\r | |
| 41 | and x5, x4, #ARM_CORE_MASK // Get core number.\r | |
| 42 | and x4, x4, #ARM_CLUSTER_MASK // Get cluster number.\r | |
| 43 | add x4, x5, x4, LSR #6 // Add scaled cluster number to core number.\r | |
| 44 | lsl x4, x4, 3 // Get mailbox offset for this core.\r | |
| 45 | ldr x5, AsmMailboxbase // Get mailbox addr relative to pc (36 bytes ahead).\r | |
| 46 | add x4, x4, x5 // Add core mailbox offset to base of mailbox.\r | |
| 47 | 1: ldr x5, [x4] // Load value from mailbox.\r | |
| 48 | cmp xzr, x5 // Has the mailbox been set?\r | |
| 49 | b.ne 2f // If so break out of loop.\r | |
| 50 | wfe // If not, wait a bit.\r | |
| 51 | b 1b // Wait over, check if mailbox set again.\r | |
| 52 | 2: br x5 // Jump to mailbox value.\r | |
| 53 | \r | |
| 54 | .align 3 // Make sure the variable below is 8 byte aligned.\r | |
| 55 | .global AsmMailboxbase\r | |
| 56 | AsmMailboxbase: .xword 0xdeaddeadbeefbeef\r | |
| 57 | \r | |
| 58 | SecondariesPenEnd:\r |