ArmPlatformPkg: Add ArmPlatformGetPlatformPpiList()

[mirror_edk2.git] / ArmPkg / ArmPkg.dec

#/** @file\r
# ARM processor package.\r
#\r
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>\r
#\r
#    This program and the accompanying materials\r
#    are licensed and made available under the terms and conditions of the BSD License\r
#    which accompanies this distribution. The full text of the license may be found at\r
#    http://opensource.org/licenses/bsd-license.php\r
#\r
#    THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
#    WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
#**/\r
\r
[Defines]\r
  DEC_SPECIFICATION              = 0x00010005\r
  PACKAGE_NAME                   = ArmPkg\r
  PACKAGE_GUID                   = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F\r
  PACKAGE_VERSION                = 0.1\r
\r
################################################################################\r
#\r
# Include Section - list of Include Paths that are provided by this package.\r
#                   Comments are used for Keywords and Module Types.\r
#\r
# Supported Module Types:\r
#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION\r
#\r
################################################################################\r
[Includes.common]\r
  Include                        # Root include for the package\r
\r
[LibraryClasses.common]\r
  ArmLib|Include/Library/ArmLib.h\r
  SemihostLib|Include/Library/Semihosting.h\r
  UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h\r
  DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h\r
  ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h\r
  \r
[Guids.common]\r
  gArmTokenSpaceGuid       = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }\r
\r
[Protocols.common]\r
  gVirtualUncachedPagesProtocolGuid = { 0xAD651C7D, 0x3C22, 0x4DBF, { 0x92, 0xe8, 0x38, 0xa7, 0xcd, 0xae, 0x87, 0xb2 } }\r
\r
[PcdsFeatureFlag.common]\r
  gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001\r
\r
  # On ARM Architecture with the Security Extension, the address for the\r
  # Vector Table can be mapped anywhere in the memory map. It means we can\r
  # point the Exception Vector Table to its location in CpuDxe.\r
  # By default we copy the Vector Table at  PcdGet32(PcdCpuVectorBaseAddress)\r
  gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022\r
  # Set this PCD to TRUE if the Exception Vector is changed to add debugger support before\r
  # it has been configured by the CPU DXE\r
  gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032\r
  \r
  gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered|FALSE|BOOLEAN|0x00000025\r
\r
[PcdsFixedAtBuild.common]\r
  # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.\r
  # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.\r
  gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024\r
\r
  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002\r
  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003\r
  gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004\r
  gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005\r
  \r
  #\r
  # ARM PL390 General Interrupt Controller\r
  #\r
  gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C\r
  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D\r
  gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023\r
\r
  #\r
  # ARM Secure Firmware PCDs\r
  #\r
  gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015\r
  gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016\r
  gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT32|0x0000002F\r
  gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030\r
\r
  #\r
  # ARM Normal (or Non Secure) Firmware PCDs\r
  #\r
  gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT32|0x0000002B\r
  gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C\r
  gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT32|0x0000002D\r
  gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E\r
\r
  # System Memory (DRAM): These PCDs define the region of in-built system memory\r
  # Some platforms can get DRAM extensions, these additional regions will be declared\r
  # to UEFI by ArmPLatformPlib   \r
  gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT32|0x00000029\r
  gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT32|0x0000002A\r
\r
  # Use ClusterId + CoreId to identify the PrimaryCore\r
  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031\r
  # The Primary Core is ClusterId[0] & CoreId[0] \r
  gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037\r
\r
  #\r
  # ARM MPCore MailBox PCDs\r
  #\r
  # Address to Set/Get to Mailbox in Multicore system\r
  gArmTokenSpaceGuid.PcdMPCoreMailboxSetAddress|0|UINT32|0x00000017\r
  gArmTokenSpaceGuid.PcdMPCoreMailboxGetAddress|0|UINT32|0x00000018\r
  # Address/Value to clear Mailbox in Multicore system\r
  gArmTokenSpaceGuid.PcdMPCoreMailboxClearAddress|0|UINT32|0x00000019\r
  gArmTokenSpaceGuid.PcdMPCoreMailboxClearValue|0|UINT32|0x0000001A\r
\r
  #\r
  # ARM L2x0 PCDs\r
  #\r
  gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B\r
  \r
  #\r
  # ARM PL390 General Interrupt Controller\r
  #\r
  gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000001C\r
  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000001D\r
  \r
  # \r
  # BdsLib\r
  #\r
  gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E\r
  # The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory\r
  gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F\r
  # The Linux ATAGs are expected to be under 0x4000 (16KB) from the beginning of the System Memory\r
  gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x00000020\r
\r