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1bfda055 1/** @file\r
2*\r
793ca69f 3* Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
1bfda055 4*\r
4059386c 5* SPDX-License-Identifier: BSD-2-Clause-Patent\r
1bfda055 6*\r
7**/\r
8\r
92534106 9#include <Base.h>\r
10#include <Library/DebugLib.h>\r
1bfda055 11#include <Library/IoLib.h>\r
55a0d64b 12#include <Library/ArmGicLib.h>\r
1bfda055 13\r
92534106 14/*\r
15 * This function configures the interrupts set by the mask to be secure.\r
16 *\r
17 */\r
18VOID\r
19EFIAPI\r
20ArmGicSetSecureInterrupts (\r
21 IN UINTN GicDistributorBase,\r
22 IN UINTN* GicSecureInterruptMask,\r
23 IN UINTN GicSecureInterruptMaskSize\r
24 )\r
25{\r
26 UINTN Index;\r
27 UINT32 InterruptStatus;\r
28\r
29 // We must not have more interrupts defined by the mask than the number of available interrupts\r
e9f7c58f 30 ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32));\r
92534106 31\r
32 // Set all the interrupts defined by the mask as Secure\r
33 for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {\r
34 InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4));\r
35 MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), InterruptStatus & (~GicSecureInterruptMask[Index]));\r
36 }\r
37}\r
38\r
1bfda055 39VOID\r
40EFIAPI\r
793ca69f
OM
41ArmGicEnableDistributor (\r
42 IN INTN GicDistributorBase\r
1bfda055 43 )\r
44{\r
793ca69f
OM
45 // Turn on the GIC distributor\r
46 MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);\r
1bfda055 47}\r
48\r
9736c297 49VOID\r
50EFIAPI\r
793ca69f
OM
51ArmGicSetupNonSecure (\r
52 IN UINTN MpId,\r
53 IN INTN GicDistributorBase,\r
9736c297 54 IN INTN GicInterruptInterfaceBase\r
55 )\r
56{\r
793ca69f 57 ArmGicV2SetupNonSecure (MpId, GicDistributorBase, GicInterruptInterfaceBase);\r
1bfda055 58}\r