[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / AArch64 / Mmu.c

/*++\r
\r
Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
\r
--*/\r
\r
#include <Library/MemoryAllocationLib.h>\r
#include "CpuDxe.h"\r
\r
#define TT_ATTR_INDX_INVALID    ((UINT32)~0)\r
\r
STATIC\r
UINT64\r
GetFirstPageAttribute (\r
  IN UINT64  *FirstLevelTableAddress,\r
  IN UINTN    TableLevel\r
  )\r
{\r
  UINT64 FirstEntry;\r
\r
  // Get the first entry of the table\r
  FirstEntry = *FirstLevelTableAddress;\r
\r
  if ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {\r
    // Only valid for Levels 0, 1 and 2\r
    ASSERT (TableLevel < 3);\r
\r
    // Get the attribute of the subsequent table\r
    return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);\r
  } else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||\r
             ((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))\r
  {\r
    return FirstEntry & TT_ATTR_INDX_MASK;\r
  } else {\r
    return TT_ATTR_INDX_INVALID;\r
  }\r
}\r
\r
STATIC\r
UINT64\r
GetNextEntryAttribute (\r
  IN     UINT64 *TableAddress,\r
  IN     UINTN   EntryCount,\r
  IN     UINTN   TableLevel,\r
  IN     UINT64  BaseAddress,\r
  IN OUT UINT32 *PrevEntryAttribute,\r
  IN OUT UINT64 *StartGcdRegion\r
  )\r
{\r
  UINTN                             Index;\r
  UINT64                            Entry;\r
  UINT32                            EntryAttribute;\r
  UINT32                            EntryType;\r
  EFI_STATUS                        Status;\r
  UINTN                             NumberOfDescriptors;\r
  EFI_GCD_MEMORY_SPACE_DESCRIPTOR  *MemorySpaceMap;\r
\r
  // Get the memory space map from GCD\r
  MemorySpaceMap = NULL;\r
  Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  // We cannot get more than 3-level page table\r
  ASSERT (TableLevel <= 3);\r
\r
  // While the top level table might not contain TT_ENTRY_COUNT entries;\r
  // the subsequent ones should be filled up\r
  for (Index = 0; Index < EntryCount; Index++) {\r
    Entry = TableAddress[Index];\r
    EntryType = Entry & TT_TYPE_MASK;\r
    EntryAttribute = Entry  & TT_ATTR_INDX_MASK;\r
\r
    // If Entry is a Table Descriptor type entry then go through the sub-level table\r
    if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||\r
        ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {\r
      if ((*PrevEntryAttribute == TT_ATTR_INDX_INVALID) || (EntryAttribute != *PrevEntryAttribute)) {\r
        if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {\r
          // Update GCD with the last region\r
          SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
              *StartGcdRegion,\r
              (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,\r
              PageAttributeToGcdAttribute (EntryAttribute));\r
        }\r
\r
        // Start of the new region\r
        *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));\r
        *PrevEntryAttribute = EntryAttribute;\r
      } else {\r
        continue;\r
      }\r
    } else if (EntryType == TT_TYPE_TABLE_ENTRY) {\r
      // Table Entry type is only valid for Level 0, 1, 2\r
      ASSERT (TableLevel < 3);\r
\r
      // Increase the level number and scan the sub-level table\r
      GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),\r
                             TT_ENTRY_COUNT, TableLevel + 1,\r
                             (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),\r
                             PrevEntryAttribute, StartGcdRegion);\r
    } else {\r
      if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {\r
        // Update GCD with the last region\r
        SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
            *StartGcdRegion,\r
            (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,\r
            PageAttributeToGcdAttribute (*PrevEntryAttribute));\r
\r
        // Start of the new region\r
        *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));\r
        *PrevEntryAttribute = TT_ATTR_INDX_INVALID;\r
      }\r
    }\r
  }\r
\r
  FreePool (MemorySpaceMap);\r
\r
  return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));\r
}\r
\r
EFI_STATUS\r
SyncCacheConfig (\r
  IN  EFI_CPU_ARCH_PROTOCOL *CpuProtocol\r
  )\r
{\r
  EFI_STATUS                          Status;\r
  UINT32                              PageAttribute = 0;\r
  UINT64                             *FirstLevelTableAddress;\r
  UINTN                               TableLevel;\r
  UINTN                               TableCount;\r
  UINTN                               NumberOfDescriptors;\r
  EFI_GCD_MEMORY_SPACE_DESCRIPTOR    *MemorySpaceMap;\r
  UINTN                               Tcr;\r
  UINTN                               T0SZ;\r
  UINT64                              BaseAddressGcdRegion;\r
  UINT64                              EndAddressGcdRegion;\r
\r
  // This code assumes MMU is enabled and filed with section translations\r
  ASSERT (ArmMmuEnabled ());\r
\r
  //\r
  // Get the memory space map from GCD\r
  //\r
  MemorySpaceMap = NULL;\r
  Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  // The GCD implementation maintains its own copy of the state of memory space attributes.  GCD needs\r
  // to know what the initial memory space attributes are.  The CPU Arch. Protocol does not provide a\r
  // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were\r
  // a client) to update its copy of the attributes.  This is bad architecture and should be replaced\r
  // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.\r
\r
  // Obtain page table base\r
  FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());\r
\r
  // Get Translation Control Register value\r
  Tcr = ArmGetTCR ();\r
  // Get Address Region Size\r
  T0SZ = Tcr & TCR_T0SZ_MASK;\r
\r
  // Get the level of the first table for the indicated Address Region Size\r
  GetRootTranslationTableInfo (T0SZ, &TableLevel, &TableCount);\r
\r
  // First Attribute of the Page Tables\r
  PageAttribute = GetFirstPageAttribute (FirstLevelTableAddress, TableLevel);\r
\r
  // We scan from the start of the memory map (ie: at the address 0x0)\r
  BaseAddressGcdRegion = 0x0;\r
  EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,\r
                                               TableCount, TableLevel,\r
                                               BaseAddressGcdRegion,\r
                                               &PageAttribute, &BaseAddressGcdRegion);\r
\r
  // Update GCD with the last region if valid\r
  if (PageAttribute != TT_ATTR_INDX_INVALID) {\r
    SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
        BaseAddressGcdRegion,\r
        EndAddressGcdRegion - BaseAddressGcdRegion,\r
        PageAttributeToGcdAttribute (PageAttribute));\r
  }\r
\r
  FreePool (MemorySpaceMap);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
UINT64\r
EfiAttributeToArmAttribute (\r
  IN UINT64                    EfiAttributes\r
  )\r
{\r
  UINT64 ArmAttributes;\r
\r
  switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {\r
  case EFI_MEMORY_UC:\r
    ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;\r
    break;\r
  case EFI_MEMORY_WC:\r
    ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;\r
    break;\r
  case EFI_MEMORY_WT:\r
    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH;\r
    break;\r
  case EFI_MEMORY_WB:\r
    ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK;\r
    break;\r
  default:\r
    DEBUG ((EFI_D_ERROR, "EfiAttributeToArmAttribute: 0x%lX attributes is not supported.\n", EfiAttributes));\r
    ASSERT (0);\r
    ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;\r
  }\r
\r
  // Set the access flag to match the block attributes\r
  ArmAttributes |= TT_AF;\r
\r
  // Determine protection attributes\r
  if (EfiAttributes & EFI_MEMORY_WP) {\r
    ArmAttributes |= TT_AP_RO_RO;\r
  }\r
\r
  // Process eXecute Never attribute\r
  if (EfiAttributes & EFI_MEMORY_XP) {\r
    ArmAttributes |= TT_PXN_MASK;\r
  }\r
\r
  return ArmAttributes;\r
}\r
\r
// This function will recursively go down the page table to find the first block address linked to 'BaseAddress'.\r
// And then the function will identify the size of the region that has the same page table attribute.\r
EFI_STATUS\r
GetMemoryRegionRec (\r
  IN     UINT64                  *TranslationTable,\r
  IN     UINTN                    TableLevel,\r
  IN     UINT64                  *LastBlockEntry,\r
  IN OUT UINTN                   *BaseAddress,\r
  OUT    UINTN                   *RegionLength,\r
  OUT    UINTN                   *RegionAttributes\r
  )\r
{\r
  EFI_STATUS Status;\r
  UINT64    *NextTranslationTable;\r
  UINT64    *BlockEntry;\r
  UINT64     BlockEntryType;\r
  UINT64     EntryType;\r
\r
  if (TableLevel != 3) {\r
    BlockEntryType = TT_TYPE_BLOCK_ENTRY;\r
  } else {\r
    BlockEntryType = TT_TYPE_BLOCK_ENTRY_LEVEL3;\r
  }\r
\r
  // Find the block entry linked to the Base Address\r
  BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);\r
  EntryType = *BlockEntry & TT_TYPE_MASK;\r
\r
  if (EntryType == TT_TYPE_TABLE_ENTRY) {\r
    NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);\r
\r
    // The entry is a page table, so we go to the next level\r
    Status = GetMemoryRegionRec (\r
        NextTranslationTable, // Address of the next level page table\r
        TableLevel + 1, // Next Page Table level\r
        (UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT),\r
        BaseAddress, RegionLength, RegionAttributes);\r
\r
    // In case of 'Success', it means the end of the block region has been found into the upper\r
    // level translation table\r
    if (!EFI_ERROR(Status)) {\r
      return EFI_SUCCESS;\r
    }\r
  } else if (EntryType == BlockEntryType) {\r
    // We have found the BlockEntry attached to the address. We save its start address (the start\r
    // address might be before the 'BaseAdress') and attributes\r
    *BaseAddress      = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);\r
    *RegionLength     = 0;\r
    *RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;\r
  } else {\r
    // We have an 'Invalid' entry\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  while (BlockEntry <= LastBlockEntry) {\r
    if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {\r
      *RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel);\r
    } else {\r
      // In case we have found the end of the region we return success\r
      return EFI_SUCCESS;\r
    }\r
    BlockEntry++;\r
  }\r
\r
  // If we have reached the end of the TranslationTable and we have not found the end of the region then\r
  // we return EFI_NOT_FOUND.\r
  // The caller will continue to look for the memory region at its level\r
  return EFI_NOT_FOUND;\r
}\r
\r
EFI_STATUS\r
GetMemoryRegion (\r
  IN OUT UINTN                   *BaseAddress,\r
  OUT    UINTN                   *RegionLength,\r
  OUT    UINTN                   *RegionAttributes\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINT64     *TranslationTable;\r
  UINTN       TableLevel;\r
  UINTN       EntryCount;\r
  UINTN       T0SZ;\r
\r
  ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));\r
\r
  TranslationTable = ArmGetTTBR0BaseAddress ();\r
\r
  T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;\r
  // Get the Table info from T0SZ\r
  GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);\r
\r
  Status = GetMemoryRegionRec (TranslationTable, TableLevel,\r
      (UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),\r
      BaseAddress, RegionLength, RegionAttributes);\r
\r
  // If the region continues up to the end of the root table then GetMemoryRegionRec()\r
  // will return EFI_NOT_FOUND\r
  if (Status == EFI_NOT_FOUND) {\r
    return EFI_SUCCESS;\r
  } else {\r
    return Status;\r
  }\r
}\r
Commit	Line	Data
25402f5d HL	1	/*++\r
	2	\r
	3	Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
	4	Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
	5	Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>\r
	6	\r
	7	This program and the accompanying materials\r
	8	are licensed and made available under the terms and conditions of the BSD License\r
	9	which accompanies this distribution. The full text of the license may be found at\r
	10	http://opensource.org/licenses/bsd-license.php\r
	11	\r
	12	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	13	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	14	\r
	15	\r
	16	--*/\r
	17	\r
5b53eaff	18	#include <Library/MemoryAllocationLib.h>\r
25402f5d HL	19	#include "CpuDxe.h"\r
	20	\r
	21	#define TT_ATTR_INDX_INVALID ((UINT32)~0)\r
	22	\r
	23	STATIC\r
	24	UINT64\r
	25	GetFirstPageAttribute (\r
	26	IN UINT64 *FirstLevelTableAddress,\r
	27	IN UINTN TableLevel\r
	28	)\r
	29	{\r
	30	UINT64 FirstEntry;\r
	31	\r
	32	// Get the first entry of the table\r
	33	FirstEntry = *FirstLevelTableAddress;\r
	34	\r
	35	if ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {\r
	36	// Only valid for Levels 0, 1 and 2\r
	37	ASSERT (TableLevel < 3);\r
	38	\r
	39	// Get the attribute of the subsequent table\r
	40	return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);\r
	41	} else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) \|\|\r
	42	((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))\r
	43	{\r
	44	return FirstEntry & TT_ATTR_INDX_MASK;\r
	45	} else {\r
	46	return TT_ATTR_INDX_INVALID;\r
	47	}\r
	48	}\r
	49	\r
	50	STATIC\r
	51	UINT64\r
	52	GetNextEntryAttribute (\r
	53	IN UINT64 *TableAddress,\r
	54	IN UINTN EntryCount,\r
	55	IN UINTN TableLevel,\r
	56	IN UINT64 BaseAddress,\r
	57	IN OUT UINT32 *PrevEntryAttribute,\r
	58	IN OUT UINT64 *StartGcdRegion\r
	59	)\r
	60	{\r
	61	UINTN Index;\r
	62	UINT64 Entry;\r
	63	UINT32 EntryAttribute;\r
	64	UINT32 EntryType;\r
	65	EFI_STATUS Status;\r
	66	UINTN NumberOfDescriptors;\r
	67	EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;\r
	68	\r
	69	// Get the memory space map from GCD\r
	70	MemorySpaceMap = NULL;\r
	71	Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
	72	ASSERT_EFI_ERROR (Status);\r
	73	\r
	74	// We cannot get more than 3-level page table\r
	75	ASSERT (TableLevel <= 3);\r
	76	\r
	77	// While the top level table might not contain TT_ENTRY_COUNT entries;\r
	78	// the subsequent ones should be filled up\r
	79	for (Index = 0; Index < EntryCount; Index++) {\r
	80	Entry = TableAddress[Index];\r
	81	EntryType = Entry & TT_TYPE_MASK;\r
	82	EntryAttribute = Entry & TT_ATTR_INDX_MASK;\r
83	\r
84	// If Entry is a Table Descriptor type entry then go through the sub-level table\r
85	if ((EntryType == TT_TYPE_BLOCK_ENTRY) \|\|\r
86	((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {\r
87	if ((PrevEntryAttribute == TT_ATTR_INDX_INVALID) \|\| (EntryAttribute != PrevEntryAttribute)) {\r
88	if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {\r
89	// Update GCD with the last region\r
90	SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
91	*StartGcdRegion,\r
047c0cbb	92	(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,\r
25402f5d HL	93	PageAttributeToGcdAttribute (EntryAttribute));\r
	94	}\r
	95	\r
	96	// Start of the new region\r
	97	StartGcdRegion = BaseAddress + (Index TT_ADDRESS_AT_LEVEL(TableLevel));\r
	98	*PrevEntryAttribute = EntryAttribute;\r
	99	} else {\r
	100	continue;\r
	101	}\r
	102	} else if (EntryType == TT_TYPE_TABLE_ENTRY) {\r
	103	// Table Entry type is only valid for Level 0, 1, 2\r
	104	ASSERT (TableLevel < 3);\r
	105	\r
	106	// Increase the level number and scan the sub-level table\r
	107	GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),\r
	108	TT_ENTRY_COUNT, TableLevel + 1,\r
	109	(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),\r
	110	PrevEntryAttribute, StartGcdRegion);\r
	111	} else {\r
	112	if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {\r
	113	// Update GCD with the last region\r
	114	SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
	115	*StartGcdRegion,\r
047c0cbb OM	116	(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,\r
047c0cbb OM	117	PageAttributeToGcdAttribute (*PrevEntryAttribute));\r
25402f5d HL	118	\r
	119	// Start of the new region\r
	120	StartGcdRegion = BaseAddress + (Index TT_ADDRESS_AT_LEVEL(TableLevel));\r
	121	*PrevEntryAttribute = TT_ATTR_INDX_INVALID;\r
	122	}\r
	123	}\r
	124	}\r
	125	\r
5b53eaff OM	126	FreePool (MemorySpaceMap);\r
5b53eaff OM	127	\r
25402f5d HL	128	return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));\r
	129	}\r
	130	\r
	131	EFI_STATUS\r
	132	SyncCacheConfig (\r
	133	IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol\r
	134	)\r
	135	{\r
	136	EFI_STATUS Status;\r
	137	UINT32 PageAttribute = 0;\r
	138	UINT64 *FirstLevelTableAddress;\r
	139	UINTN TableLevel;\r
	140	UINTN TableCount;\r
	141	UINTN NumberOfDescriptors;\r
	142	EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;\r
	143	UINTN Tcr;\r
	144	UINTN T0SZ;\r
	145	UINT64 BaseAddressGcdRegion;\r
	146	UINT64 EndAddressGcdRegion;\r
	147	\r
	148	// This code assumes MMU is enabled and filed with section translations\r
	149	ASSERT (ArmMmuEnabled ());\r
	150	\r
	151	//\r
	152	// Get the memory space map from GCD\r
	153	//\r
	154	MemorySpaceMap = NULL;\r
	155	Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
	156	ASSERT_EFI_ERROR (Status);\r
	157	\r
	158	// The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs\r
	159	// to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a\r
	160	// GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were\r
	161	// a client) to update its copy of the attributes. This is bad architecture and should be replaced\r
	162	// with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.\r
	163	\r
	164	// Obtain page table base\r
	165	FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());\r
	166	\r
	167	// Get Translation Control Register value\r
	168	Tcr = ArmGetTCR ();\r
	169	// Get Address Region Size\r
	170	T0SZ = Tcr & TCR_T0SZ_MASK;\r
	171	\r
	172	// Get the level of the first table for the indicated Address Region Size\r
	173	GetRootTranslationTableInfo (T0SZ, &TableLevel, &TableCount);\r
	174	\r
	175	// First Attribute of the Page Tables\r
	176	PageAttribute = GetFirstPageAttribute (FirstLevelTableAddress, TableLevel);\r
	177	\r
	178	// We scan from the start of the memory map (ie: at the address 0x0)\r
	179	BaseAddressGcdRegion = 0x0;\r
	180	EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,\r
	181	TableCount, TableLevel,\r
	182	BaseAddressGcdRegion,\r
	183	&PageAttribute, &BaseAddressGcdRegion);\r
	184	\r
047c0cbb OM	185	// Update GCD with the last region if valid\r
	186	if (PageAttribute != TT_ATTR_INDX_INVALID) {\r
	187	SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
	188	BaseAddressGcdRegion,\r
	189	EndAddressGcdRegion - BaseAddressGcdRegion,\r
	190	PageAttributeToGcdAttribute (PageAttribute));\r
	191	}\r
25402f5d	192	\r
5b53eaff OM	193	FreePool (MemorySpaceMap);\r
5b53eaff OM	194	\r
25402f5d HL	195	return EFI_SUCCESS;\r
25402f5d HL	196	}\r
2e969d2e OM	197	\r
	198	UINT64\r
	199	EfiAttributeToArmAttribute (\r
	200	IN UINT64 EfiAttributes\r
	201	)\r
	202	{\r
	203	UINT64 ArmAttributes;\r
	204	\r
	205	switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {\r
	206	case EFI_MEMORY_UC:\r
	207	ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;\r
	208	break;\r
	209	case EFI_MEMORY_WC:\r
	210	ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;\r
	211	break;\r
	212	case EFI_MEMORY_WT:\r
	213	ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH;\r
	214	break;\r
	215	case EFI_MEMORY_WB:\r
	216	ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK;\r
	217	break;\r
	218	default:\r
	219	DEBUG ((EFI_D_ERROR, "EfiAttributeToArmAttribute: 0x%lX attributes is not supported.\n", EfiAttributes));\r
	220	ASSERT (0);\r
	221	ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;\r
	222	}\r
	223	\r
	224	// Set the access flag to match the block attributes\r
	225	ArmAttributes \|= TT_AF;\r
	226	\r
	227	// Determine protection attributes\r
	228	if (EfiAttributes & EFI_MEMORY_WP) {\r
	229	ArmAttributes \|= TT_AP_RO_RO;\r
	230	}\r
	231	\r
	232	// Process eXecute Never attribute\r
	233	if (EfiAttributes & EFI_MEMORY_XP) {\r
	234	ArmAttributes \|= TT_PXN_MASK;\r
	235	}\r
	236	\r
	237	return ArmAttributes;\r
	238	}\r
	239	\r
	240	// This function will recursively go down the page table to find the first block address linked to 'BaseAddress'.\r
	241	// And then the function will identify the size of the region that has the same page table attribute.\r
	242	EFI_STATUS\r
	243	GetMemoryRegionRec (\r
	244	IN UINT64 *TranslationTable,\r
	245	IN UINTN TableLevel,\r
	246	IN UINT64 *LastBlockEntry,\r
	247	IN OUT UINTN *BaseAddress,\r
	248	OUT UINTN *RegionLength,\r
	249	OUT UINTN *RegionAttributes\r
	250	)\r
	251	{\r
	252	EFI_STATUS Status;\r
	253	UINT64 *NextTranslationTable;\r
	254	UINT64 *BlockEntry;\r
	255	UINT64 BlockEntryType;\r
	256	UINT64 EntryType;\r
	257	\r
	258	if (TableLevel != 3) {\r
	259	BlockEntryType = TT_TYPE_BLOCK_ENTRY;\r
	260	} else {\r
261	BlockEntryType = TT_TYPE_BLOCK_ENTRY_LEVEL3;\r
262	}\r
263	\r
264	// Find the block entry linked to the Base Address\r
265	BlockEntry = (UINT64)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, BaseAddress);\r
266	EntryType = *BlockEntry & TT_TYPE_MASK;\r
267	\r
268	if (EntryType == TT_TYPE_TABLE_ENTRY) {\r
269	NextTranslationTable = (UINT64)(BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);\r
270	\r
271	// The entry is a page table, so we go to the next level\r
272	Status = GetMemoryRegionRec (\r
273	NextTranslationTable, // Address of the next level page table\r
274	TableLevel + 1, // Next Page Table level\r
275	(UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT),\r
276	BaseAddress, RegionLength, RegionAttributes);\r
277	\r
278	// In case of 'Success', it means the end of the block region has been found into the upper\r
279	// level translation table\r
280	if (!EFI_ERROR(Status)) {\r
281	return EFI_SUCCESS;\r
282	}\r
283	} else if (EntryType == BlockEntryType) {\r
284	// We have found the BlockEntry attached to the address. We save its start address (the start\r
285	// address might be before the 'BaseAdress') and attributes\r
286	BaseAddress = BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);\r
287	*RegionLength = 0;\r
288	RegionAttributes = BlockEntry & TT_ATTRIBUTES_MASK;\r
289	} else {\r
290	// We have an 'Invalid' entry\r
291	return EFI_UNSUPPORTED;\r
292	}\r
293	\r
294	while (BlockEntry <= LastBlockEntry) {\r
295	if ((BlockEntry & TT_ATTRIBUTES_MASK) == RegionAttributes) {\r
296	RegionLength = RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel);\r
297	} else {\r
298	// In case we have found the end of the region we return success\r
299	return EFI_SUCCESS;\r
300	}\r
301	BlockEntry++;\r
302	}\r
303	\r
304	// If we have reached the end of the TranslationTable and we have not found the end of the region then\r
305	// we return EFI_NOT_FOUND.\r
306	// The caller will continue to look for the memory region at its level\r
307	return EFI_NOT_FOUND;\r
308	}\r
309	\r
310	EFI_STATUS\r
311	GetMemoryRegion (\r
312	IN OUT UINTN *BaseAddress,\r
313	OUT UINTN *RegionLength,\r
314	OUT UINTN *RegionAttributes\r
315	)\r
316	{\r
317	EFI_STATUS Status;\r
318	UINT64 *TranslationTable;\r
319	UINTN TableLevel;\r
320	UINTN EntryCount;\r
321	UINTN T0SZ;\r
322	\r
323	ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL));\r
324	\r
325	TranslationTable = ArmGetTTBR0BaseAddress ();\r
326	\r
327	T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;\r
328	// Get the Table info from T0SZ\r
329	GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);\r
330	\r
331	Status = GetMemoryRegionRec (TranslationTable, TableLevel,\r
332	(UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),\r
333	BaseAddress, RegionLength, RegionAttributes);\r
334	\r
335	// If the region continues up to the end of the root table then GetMemoryRegionRec()\r
336	// will return EFI_NOT_FOUND\r
337	if (Status == EFI_NOT_FOUND) {\r
338	return EFI_SUCCESS;\r
339	} else {\r
340	return Status;\r
341	}\r
342	}\r