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ArmPkg/ArmLib/AArch64: Use the appropriate macros and update comments
[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / AArch64 / Mmu.c
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1/*++\r
2\r
3Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
4Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
5Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>\r
6\r
7This program and the accompanying materials\r
8are licensed and made available under the terms and conditions of the BSD License\r
9which accompanies this distribution. The full text of the license may be found at\r
10http://opensource.org/licenses/bsd-license.php\r
11\r
12THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14\r
15\r
16--*/\r
17\r
18#include "CpuDxe.h"\r
19\r
20#define TT_ATTR_INDX_INVALID ((UINT32)~0)\r
21\r
22STATIC\r
23UINT64\r
24GetFirstPageAttribute (\r
25 IN UINT64 *FirstLevelTableAddress,\r
26 IN UINTN TableLevel\r
27 )\r
28{\r
29 UINT64 FirstEntry;\r
30\r
31 // Get the first entry of the table\r
32 FirstEntry = *FirstLevelTableAddress;\r
33\r
34 if ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {\r
35 // Only valid for Levels 0, 1 and 2\r
36 ASSERT (TableLevel < 3);\r
37\r
38 // Get the attribute of the subsequent table\r
39 return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);\r
40 } else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||\r
41 ((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))\r
42 {\r
43 return FirstEntry & TT_ATTR_INDX_MASK;\r
44 } else {\r
45 return TT_ATTR_INDX_INVALID;\r
46 }\r
47}\r
48\r
49STATIC\r
50UINT64\r
51GetNextEntryAttribute (\r
52 IN UINT64 *TableAddress,\r
53 IN UINTN EntryCount,\r
54 IN UINTN TableLevel,\r
55 IN UINT64 BaseAddress,\r
56 IN OUT UINT32 *PrevEntryAttribute,\r
57 IN OUT UINT64 *StartGcdRegion\r
58 )\r
59{\r
60 UINTN Index;\r
61 UINT64 Entry;\r
62 UINT32 EntryAttribute;\r
63 UINT32 EntryType;\r
64 EFI_STATUS Status;\r
65 UINTN NumberOfDescriptors;\r
66 EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;\r
67\r
68 // Get the memory space map from GCD\r
69 MemorySpaceMap = NULL;\r
70 Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
71 ASSERT_EFI_ERROR (Status);\r
72\r
73 // We cannot get more than 3-level page table\r
74 ASSERT (TableLevel <= 3);\r
75\r
76 // While the top level table might not contain TT_ENTRY_COUNT entries;\r
77 // the subsequent ones should be filled up\r
78 for (Index = 0; Index < EntryCount; Index++) {\r
79 Entry = TableAddress[Index];\r
80 EntryType = Entry & TT_TYPE_MASK;\r
81 EntryAttribute = Entry & TT_ATTR_INDX_MASK;\r
82\r
83 // If Entry is a Table Descriptor type entry then go through the sub-level table\r
84 if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||\r
85 ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {\r
86 if ((*PrevEntryAttribute == TT_ATTR_INDX_INVALID) || (EntryAttribute != *PrevEntryAttribute)) {\r
87 if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {\r
88 // Update GCD with the last region\r
89 SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
90 *StartGcdRegion,\r
91 (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)) - 1) - *StartGcdRegion,\r
92 PageAttributeToGcdAttribute (EntryAttribute));\r
93 }\r
94\r
95 // Start of the new region\r
96 *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));\r
97 *PrevEntryAttribute = EntryAttribute;\r
98 } else {\r
99 continue;\r
100 }\r
101 } else if (EntryType == TT_TYPE_TABLE_ENTRY) {\r
102 // Table Entry type is only valid for Level 0, 1, 2\r
103 ASSERT (TableLevel < 3);\r
104\r
105 // Increase the level number and scan the sub-level table\r
106 GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),\r
107 TT_ENTRY_COUNT, TableLevel + 1,\r
108 (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),\r
109 PrevEntryAttribute, StartGcdRegion);\r
110 } else {\r
111 if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {\r
112 // Update GCD with the last region\r
113 SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
114 *StartGcdRegion,\r
115 (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)) - 1) - *StartGcdRegion,\r
116 PageAttributeToGcdAttribute (EntryAttribute));\r
117\r
118 // Start of the new region\r
119 *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));\r
120 *PrevEntryAttribute = TT_ATTR_INDX_INVALID;\r
121 }\r
122 }\r
123 }\r
124\r
125 return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));\r
126}\r
127\r
128EFI_STATUS\r
129SyncCacheConfig (\r
130 IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol\r
131 )\r
132{\r
133 EFI_STATUS Status;\r
134 UINT32 PageAttribute = 0;\r
135 UINT64 *FirstLevelTableAddress;\r
136 UINTN TableLevel;\r
137 UINTN TableCount;\r
138 UINTN NumberOfDescriptors;\r
139 EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;\r
140 UINTN Tcr;\r
141 UINTN T0SZ;\r
142 UINT64 BaseAddressGcdRegion;\r
143 UINT64 EndAddressGcdRegion;\r
144\r
145 // This code assumes MMU is enabled and filed with section translations\r
146 ASSERT (ArmMmuEnabled ());\r
147\r
148 //\r
149 // Get the memory space map from GCD\r
150 //\r
151 MemorySpaceMap = NULL;\r
152 Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
153 ASSERT_EFI_ERROR (Status);\r
154\r
155 // The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs\r
156 // to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a\r
157 // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were\r
158 // a client) to update its copy of the attributes. This is bad architecture and should be replaced\r
159 // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.\r
160\r
161 // Obtain page table base\r
162 FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());\r
163\r
164 // Get Translation Control Register value\r
165 Tcr = ArmGetTCR ();\r
166 // Get Address Region Size\r
167 T0SZ = Tcr & TCR_T0SZ_MASK;\r
168\r
169 // Get the level of the first table for the indicated Address Region Size\r
170 GetRootTranslationTableInfo (T0SZ, &TableLevel, &TableCount);\r
171\r
172 // First Attribute of the Page Tables\r
173 PageAttribute = GetFirstPageAttribute (FirstLevelTableAddress, TableLevel);\r
174\r
175 // We scan from the start of the memory map (ie: at the address 0x0)\r
176 BaseAddressGcdRegion = 0x0;\r
177 EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,\r
178 TableCount, TableLevel,\r
179 BaseAddressGcdRegion,\r
180 &PageAttribute, &BaseAddressGcdRegion);\r
181\r
182 // Update GCD with the last region\r
183 SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
184 BaseAddressGcdRegion,\r
185 EndAddressGcdRegion - BaseAddressGcdRegion,\r
186 PageAttributeToGcdAttribute (PageAttribute));\r
187\r
188 return EFI_SUCCESS;\r
189}\r