[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / Arm / Mmu.c

/*++\r
\r
Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>\r
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
\r
--*/\r
\r
#include <Library/MemoryAllocationLib.h>\r
#include "CpuDxe.h"\r
\r
EFI_STATUS\r
SectionToGcdAttributes (\r
  IN  UINT32  SectionAttributes,\r
  OUT UINT64  *GcdAttributes\r
  )\r
{\r
  *GcdAttributes = 0;\r
\r
  // determine cacheability attributes\r
  switch(SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {\r
    case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED:\r
      *GcdAttributes |= EFI_MEMORY_UC;\r
      break;\r
    case TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE:\r
      *GcdAttributes |= EFI_MEMORY_UC;\r
      break;\r
    case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:\r
      *GcdAttributes |= EFI_MEMORY_WT;\r
      break;\r
    case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC:\r
      *GcdAttributes |= EFI_MEMORY_WB;\r
      break;\r
    case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE:\r
      *GcdAttributes |= EFI_MEMORY_WC;\r
      break;\r
    case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC:\r
      *GcdAttributes |= EFI_MEMORY_WB;\r
      break;\r
    case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE:\r
      *GcdAttributes |= EFI_MEMORY_UC;\r
      break;\r
    default:\r
      return EFI_UNSUPPORTED;\r
  }\r
\r
  // determine protection attributes\r
  switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {\r
    case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write\r
      //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;\r
      break;\r
\r
    case TT_DESCRIPTOR_SECTION_AP_RW_NO:\r
    case TT_DESCRIPTOR_SECTION_AP_RW_RW:\r
      // normal read/write access, do not add additional attributes\r
      break;\r
\r
    // read only cases map to write-protect\r
    case TT_DESCRIPTOR_SECTION_AP_RO_NO:\r
    case TT_DESCRIPTOR_SECTION_AP_RO_RO:\r
      *GcdAttributes |= EFI_MEMORY_RO;\r
      break;\r
\r
    default:\r
      return EFI_UNSUPPORTED;\r
  }\r
\r
  // now process eXectue Never attribute\r
  if ((SectionAttributes & TT_DESCRIPTOR_SECTION_XN_MASK) != 0 ) {\r
    *GcdAttributes |= EFI_MEMORY_XP;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
PageToGcdAttributes (\r
  IN  UINT32  PageAttributes,\r
  OUT UINT64  *GcdAttributes\r
  )\r
{\r
  *GcdAttributes = 0;\r
\r
  // determine cacheability attributes\r
  switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {\r
    case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:\r
      *GcdAttributes |= EFI_MEMORY_UC;\r
      break;\r
    case TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE:\r
      *GcdAttributes |= EFI_MEMORY_UC;\r
      break;\r
    case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:\r
      *GcdAttributes |= EFI_MEMORY_WT;\r
      break;\r
    case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC:\r
      *GcdAttributes |= EFI_MEMORY_WB;\r
      break;\r
    case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE:\r
      *GcdAttributes |= EFI_MEMORY_WC;\r
      break;\r
    case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC:\r
      *GcdAttributes |= EFI_MEMORY_WB;\r
      break;\r
    case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE:\r
      *GcdAttributes |= EFI_MEMORY_UC;\r
      break;\r
    default:\r
      return EFI_UNSUPPORTED;\r
  }\r
\r
  // determine protection attributes\r
  switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {\r
    case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write\r
      //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;\r
      break;\r
\r
    case TT_DESCRIPTOR_PAGE_AP_RW_NO:\r
    case TT_DESCRIPTOR_PAGE_AP_RW_RW:\r
      // normal read/write access, do not add additional attributes\r
      break;\r
\r
    // read only cases map to write-protect\r
    case TT_DESCRIPTOR_PAGE_AP_RO_NO:\r
    case TT_DESCRIPTOR_PAGE_AP_RO_RO:\r
      *GcdAttributes |= EFI_MEMORY_RO;\r
      break;\r
\r
    default:\r
      return EFI_UNSUPPORTED;\r
  }\r
\r
  // now process eXectue Never attribute\r
  if ((PageAttributes & TT_DESCRIPTOR_PAGE_XN_MASK) != 0 ) {\r
    *GcdAttributes |= EFI_MEMORY_XP;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
SyncCacheConfigPage (\r
  IN     UINT32                             SectionIndex,\r
  IN     UINT32                             FirstLevelDescriptor,\r
  IN     UINTN                              NumberOfDescriptors,\r
  IN     EFI_GCD_MEMORY_SPACE_DESCRIPTOR    *MemorySpaceMap,\r
  IN OUT EFI_PHYSICAL_ADDRESS               *NextRegionBase,\r
  IN OUT UINT64                             *NextRegionLength,\r
  IN OUT UINT32                             *NextSectionAttributes\r
  )\r
{\r
  EFI_STATUS                          Status;\r
  UINT32                              i;\r
  volatile ARM_PAGE_TABLE_ENTRY       *SecondLevelTable;\r
  UINT32                              NextPageAttributes = 0;\r
  UINT32                              PageAttributes = 0;\r
  UINT32                              BaseAddress;\r
  UINT64                              GcdAttributes;\r
\r
  // Get the Base Address from FirstLevelDescriptor;\r
  BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
\r
  // Convert SectionAttributes into PageAttributes\r
  NextPageAttributes =\r
      TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) |\r
      TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes);\r
\r
  // obtain page table base\r
  SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);\r
\r
  for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {\r
    if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {\r
      // extract attributes (cacheability and permissions)\r
      PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);\r
\r
      if (NextPageAttributes == 0) {\r
        // start on a new region\r
        *NextRegionLength = 0;\r
        *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
        NextPageAttributes = PageAttributes;\r
      } else if (PageAttributes != NextPageAttributes) {\r
        // Convert Section Attributes into GCD Attributes\r
        Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);\r
        ASSERT_EFI_ERROR (Status);\r
\r
        // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
        SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);\r
\r
        // start on a new region\r
        *NextRegionLength = 0;\r
        *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
        NextPageAttributes = PageAttributes;\r
      }\r
    } else if (NextPageAttributes != 0) {\r
      // Convert Page Attributes into GCD Attributes\r
      Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);\r
      ASSERT_EFI_ERROR (Status);\r
\r
      // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
      SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);\r
\r
      *NextRegionLength = 0;\r
      *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);\r
      NextPageAttributes = 0;\r
    }\r
    *NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;\r
  }\r
\r
  // Convert back PageAttributes into SectionAttributes\r
  *NextSectionAttributes =\r
      TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) |\r
      TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
SyncCacheConfig (\r
  IN  EFI_CPU_ARCH_PROTOCOL *CpuProtocol\r
  )\r
{\r
  EFI_STATUS                          Status;\r
  UINT32                              i;\r
  EFI_PHYSICAL_ADDRESS                NextRegionBase;\r
  UINT64                              NextRegionLength;\r
  UINT32                              NextSectionAttributes = 0;\r
  UINT32                              SectionAttributes = 0;\r
  UINT64                              GcdAttributes;\r
  volatile ARM_FIRST_LEVEL_DESCRIPTOR   *FirstLevelTable;\r
  UINTN                               NumberOfDescriptors;\r
  EFI_GCD_MEMORY_SPACE_DESCRIPTOR     *MemorySpaceMap;\r
\r
\r
  DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));\r
\r
  // This code assumes MMU is enabled and filed with section translations\r
  ASSERT (ArmMmuEnabled ());\r
\r
  //\r
  // Get the memory space map from GCD\r
  //\r
  MemorySpaceMap = NULL;\r
  Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
  ASSERT_EFI_ERROR (Status);\r
\r
\r
  // The GCD implementation maintains its own copy of the state of memory space attributes.  GCD needs\r
  // to know what the initial memory space attributes are.  The CPU Arch. Protocol does not provide a\r
  // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were\r
  // a client) to update its copy of the attributes.  This is bad architecture and should be replaced\r
  // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.\r
\r
  // obtain page table base\r
  FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)(ArmGetTTBR0BaseAddress ());\r
\r
  // Get the first region\r
  NextSectionAttributes = FirstLevelTable[0] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);\r
\r
  // iterate through each 1MB descriptor\r
  NextRegionBase = NextRegionLength = 0;\r
  for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {\r
    if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {\r
      // extract attributes (cacheability and permissions)\r
      SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);\r
\r
      if (NextSectionAttributes == 0) {\r
        // start on a new region\r
        NextRegionLength = 0;\r
        NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
        NextSectionAttributes = SectionAttributes;\r
      } else if (SectionAttributes != NextSectionAttributes) {\r
        // Convert Section Attributes into GCD Attributes\r
        Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);\r
        ASSERT_EFI_ERROR (Status);\r
\r
        // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
        SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);\r
\r
        // start on a new region\r
        NextRegionLength = 0;\r
        NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
        NextSectionAttributes = SectionAttributes;\r
      }\r
      NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;\r
    } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {\r
      // In this case any bits set in the 'NextSectionAttributes' are garbage and were set from\r
      // bits that are actually part of the pagetable address.  We clear it out to zero so that\r
      // the SyncCacheConfigPage will use the page attributes instead of trying to convert the\r
      // section attributes into page attributes\r
      NextSectionAttributes = 0;\r
      Status = SyncCacheConfigPage (\r
          i,FirstLevelTable[i],\r
          NumberOfDescriptors, MemorySpaceMap,\r
          &NextRegionBase,&NextRegionLength,&NextSectionAttributes);\r
      ASSERT_EFI_ERROR (Status);\r
    } else {\r
      // We do not support yet 16MB sections\r
      ASSERT ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) != TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION);\r
\r
      // start on a new region\r
      if (NextSectionAttributes != 0) {\r
        // Convert Section Attributes into GCD Attributes\r
        Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);\r
        ASSERT_EFI_ERROR (Status);\r
\r
        // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
        SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);\r
\r
        NextRegionLength = 0;\r
        NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);\r
        NextSectionAttributes = 0;\r
      }\r
      NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;\r
    }\r
  } // section entry loop\r
\r
  if (NextSectionAttributes != 0) {\r
    // Convert Section Attributes into GCD Attributes\r
    Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);\r
    ASSERT_EFI_ERROR (Status);\r
\r
    // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)\r
    SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);\r
  }\r
\r
  FreePool (MemorySpaceMap);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
UINT64\r
EfiAttributeToArmAttribute (\r
  IN UINT64                    EfiAttributes\r
  )\r
{\r
  UINT64 ArmAttributes;\r
\r
  switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {\r
    case EFI_MEMORY_UC:\r
      // Map to strongly ordered\r
      ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0\r
      break;\r
\r
    case EFI_MEMORY_WC:\r
      // Map to normal non-cachable\r
      ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0\r
      break;\r
\r
    case EFI_MEMORY_WT:\r
      // Write through with no-allocate\r
      ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0\r
      break;\r
\r
    case EFI_MEMORY_WB:\r
      // Write back (with allocate)\r
      ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1\r
      break;\r
\r
    case EFI_MEMORY_UCE:\r
    default:\r
      ArmAttributes = TT_DESCRIPTOR_SECTION_TYPE_FAULT;\r
      break;\r
  }\r
\r
  // Determine protection attributes\r
  if (EfiAttributes & EFI_MEMORY_RO) {\r
    ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO;\r
  } else {\r
    ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW;\r
  }\r
\r
  // Determine eXecute Never attribute\r
  if (EfiAttributes & EFI_MEMORY_XP) {\r
    ArmAttributes |= TT_DESCRIPTOR_SECTION_XN_MASK;\r
  }\r
\r
  return ArmAttributes;\r
}\r
\r
EFI_STATUS\r
GetMemoryRegionPage (\r
  IN     UINT32                  *PageTable,\r
  IN OUT UINTN                   *BaseAddress,\r
  OUT    UINTN                   *RegionLength,\r
  OUT    UINTN                   *RegionAttributes\r
  )\r
{\r
  UINT32      PageAttributes;\r
  UINT32      TableIndex;\r
  UINT32      PageDescriptor;\r
\r
  // Convert the section attributes into page attributes\r
  PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes, 0);\r
\r
  // Calculate index into first level translation table for start of modification\r
  TableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK)  >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;\r
  ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);\r
\r
  // Go through the page table to find the end of the section\r
  for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {\r
    // Get the section at the given index\r
    PageDescriptor = PageTable[TableIndex];\r
\r
    if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_FAULT) {\r
      // Case: End of the boundary of the region\r
      return EFI_SUCCESS;\r
    } else if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_PAGE) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {\r
      if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) == PageAttributes) {\r
        *RegionLength = *RegionLength + TT_DESCRIPTOR_PAGE_SIZE;\r
      } else {\r
        // Case: End of the boundary of the region\r
        return EFI_SUCCESS;\r
      }\r
    } else {\r
      // We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.\r
      ASSERT(0);\r
      return EFI_SUCCESS;\r
    }\r
  }\r
\r
  return EFI_NOT_FOUND;\r
}\r
\r
EFI_STATUS\r
GetMemoryRegion (\r
  IN OUT UINTN                   *BaseAddress,\r
  OUT    UINTN                   *RegionLength,\r
  OUT    UINTN                   *RegionAttributes\r
  )\r
{\r
  EFI_STATUS                  Status;\r
  UINT32                      TableIndex;\r
  UINT32                      PageAttributes;\r
  UINT32                      PageTableIndex;\r
  UINT32                      SectionDescriptor;\r
  ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;\r
  UINT32                     *PageTable;\r
\r
  // Initialize the arguments\r
  *RegionLength = 0;\r
\r
  // Obtain page table base\r
  FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();\r
\r
  // Calculate index into first level translation table for start of modification\r
  TableIndex = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;\r
  ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT);\r
\r
  // Get the section at the given index\r
  SectionDescriptor = FirstLevelTable[TableIndex];\r
  if (!SectionDescriptor) {\r
    return EFI_NOT_FOUND;\r
  }\r
\r
  // If 'BaseAddress' belongs to the section then round it to the section boundary\r
  if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||\r
      ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))\r
  {\r
    *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;\r
    *RegionAttributes = SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK;\r
  } else {\r
    // Otherwise, we round it to the page boundary\r
    *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;\r
\r
    // Get the attribute at the page table level (Level 2)\r
    PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);\r
\r
    // Calculate index into first level translation table for start of modification\r
    PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK)  >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;\r
    ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);\r
\r
    PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;\r
    *RegionAttributes = TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (PageAttributes, 0) |\r
                        TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);\r
  }\r
\r
  for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {\r
    // Get the section at the given index\r
    SectionDescriptor = FirstLevelTable[TableIndex];\r
\r
    // If the entry is a level-2 page table then we scan it to find the end of the region\r
    if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {\r
      // Extract the page table location from the descriptor\r
      PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);\r
\r
      // Scan the page table to find the end of the region.\r
      Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);\r
\r
      // If we have found the end of the region (Status == EFI_SUCCESS) then we exit the for-loop\r
      if (Status == EFI_SUCCESS) {\r
        break;\r
      }\r
    } else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||\r
               ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {\r
      if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {\r
        // If the attributes of the section differ from the one targeted then we exit the loop\r
        break;\r
      } else {\r
        *RegionLength = *RegionLength + TT_DESCRIPTOR_SECTION_SIZE;\r
      }\r
    } else {\r
      // If we are on an invalid section then it means it is the end of our section.\r
      break;\r
    }\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r