[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / ArmV4 / ExceptionSupport.S

#------------------------------------------------------------------------------\r
#\r
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution.  The full text of the license may be found at\r
# http://opensource.org/licenses/bsd-license.php\r
#\r
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
#------------------------------------------------------------------------------\r
\r
.text\r
.align 3\r
\r
GCC_ASM_EXPORT(ExceptionHandlersStart)\r
GCC_ASM_EXPORT(ExceptionHandlersEnd)\r
GCC_ASM_EXPORT(CommonExceptionEntry)\r
GCC_ASM_EXPORT(AsmCommonExceptionEntry)\r
GCC_ASM_EXPORT(CommonCExceptionHandler)\r
\r
ASM_PFX(ExceptionHandlersStart):\r
\r
ASM_PFX(Reset):\r
  b ASM_PFX(ResetEntry)\r
\r
ASM_PFX(UndefinedInstruction):\r
  b ASM_PFX(UndefinedInstructionEntry)\r
\r
ASM_PFX(SoftwareInterrupt):\r
  b ASM_PFX(SoftwareInterruptEntry)\r
\r
ASM_PFX(PrefetchAbort):\r
  b ASM_PFX(PrefetchAbortEntry)\r
\r
ASM_PFX(DataAbort):\r
  b ASM_PFX(DataAbortEntry)\r
\r
ASM_PFX(ReservedException):\r
  b ASM_PFX(ReservedExceptionEntry)\r
\r
ASM_PFX(Irq):\r
  b ASM_PFX(IrqEntry)\r
\r
ASM_PFX(Fiq):\r
  b ASM_PFX(FiqEntry)\r
\r
ASM_PFX(ResetEntry):\r
  srsdb     #0x13!                    @ Store return state on SVC stack\r
  stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
  sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR\r
  stmfd     SP!,{R0-R12}              @ Store the register state\r
\r
  mov       R0,#0\r
  ldr       R1,ASM_PFX(CommonExceptionEntry)\r
  bx        R1\r
\r
ASM_PFX(UndefinedInstructionEntry):\r
  srsdb     #0x13!                    @ Store return state on SVC stack\r
  cps       #0x13                     @ Switch to SVC for common stack\r
  stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
  sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR\r
  stmfd     SP!,{R0-R12}              @ Store the register state\r
\r
  mov       r0,#1\r
  ldr       r1,ASM_PFX(CommonExceptionEntry)\r
  bx        r1\r
\r
ASM_PFX(SoftwareInterruptEntry):\r
  srsdb     #0x13!                    @ Store return state on SVC stack\r
  stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
  sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR\r
  stmfd     SP!,{R0-R12}              @ Store the register state\r
\r
  mov       r0,#2\r
  ldr       r1,ASM_PFX(CommonExceptionEntry)\r
  bx        r1\r
\r
ASM_PFX(PrefetchAbortEntry):\r
  sub       LR,LR,#4\r
  srsdb     #0x13!                    @ Store return state on SVC stack\r
  cps       #0x13                     @ Switch to SVC for common stack\r
  stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
  sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR\r
  stmfd     SP!,{R0-R12}              @ Store the register state\r
\r
  mov       r0,#3\r
  ldr       r1,ASM_PFX(CommonExceptionEntry)\r
  bx        r1\r
\r
ASM_PFX(DataAbortEntry):\r
  sub       LR,LR,#8\r
  srsdb     #0x13!                    @ Store return state on SVC stack\r
  cps       #0x13                     @ Switch to SVC for common stack\r
  stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
  sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR\r
  stmfd     SP!,{R0-R12}              @ Store the register state\r
\r
  mov       r0,#4\r
  ldr       r1,ASM_PFX(CommonExceptionEntry)\r
  bx        r1\r
\r
ASM_PFX(ReservedExceptionEntry):\r
  srsdb     #0x13!                    @ Store return state on SVC stack\r
  cps       #0x13                     @ Switch to SVC for common stack\r
  stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
  sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR\r
  stmfd     SP!,{R0-R12}              @ Store the register state\r
\r
  mov       r0,#5\r
  ldr       r1,ASM_PFX(CommonExceptionEntry)\r
  bx        r1\r
\r
ASM_PFX(IrqEntry):\r
  sub       LR,LR,#4\r
  srsdb     #0x13!                    @ Store return state on SVC stack\r
  cps       #0x13                     @ Switch to SVC for common stack\r
  stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
  sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR\r
  stmfd     SP!,{R0-R12}              @ Store the register state\r
\r
  mov       r0,#6\r
  ldr       r1,ASM_PFX(CommonExceptionEntry)\r
  bx        r1\r
\r
ASM_PFX(FiqEntry):\r
  sub       LR,LR,#4\r
  srsdb     #0x13!                    @ Store return state on SVC stack\r
  cps       #0x13                     @ Switch to SVC for common stack\r
  stmfd     SP!,{LR}                  @ Store the link register for the current mode\r
  sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR\r
  stmfd     SP!,{R0-R12}              @ Store the register state\r
\r
  mov       r0,#7\r
  ldr       r1,ASM_PFX(CommonExceptionEntry)\r
  bx        r1\r
\r
ASM_PFX(CommonExceptionEntry):\r
  .byte       0x12\r
  .byte       0x34\r
  .byte       0x56\r
  .byte       0x78\r
\r
ASM_PFX(ExceptionHandlersEnd):\r
\r
ASM_PFX(AsmCommonExceptionEntry):\r
  mrc       p15, 0, R1, c6, c0, 2   @ Read IFAR\r
  str       R1, [SP, #0x50]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR\r
\r
  mrc       p15, 0, R1, c5, c0, 1   @ Read IFSR\r
  str       R1, [SP, #0x4c]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR\r
\r
  mrc       p15, 0, R1, c6, c0, 0   @ Read DFAR\r
  str       R1, [SP, #0x48]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR\r
\r
  mrc       p15, 0, R1, c5, c0, 0   @ Read DFSR\r
  str       R1, [SP, #0x44]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR\r
\r
  ldr       R1, [SP, #0x5c]         @ srsdb saved pre-exception CPSR on the stack\r
  str       R1, [SP, #0x40]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR\r
  and       r1, r1, #0x1f           @ Check to see if User or System Mode\r
  cmp       r1, #0x1f\r
  cmpne     r1, #0x10\r
  add       R2, SP, #0x38           @ Store it in EFI_SYSTEM_CONTEXT_ARM.LR\r
  ldmneed   r2, {lr}^               @ User or System mode, use unbanked register\r
  ldmneed   r2, {lr}                @ All other modes used banked register\r
\r
  ldr       R1, [SP, #0x58]         @ PC is the LR pushed by srsdb\r
  str       R1, [SP, #0x3c]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.PC\r
\r
  sub       R1, SP, #0x60           @ We pused 0x60 bytes on the stack\r
  str       R1, [SP, #0x34]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.SP\r
\r
                                              @ R0 is exception type\r
  mov       R1,SP                             @ Prepare System Context pointer as an argument for the exception handler\r
  blx       ASM_PFX(CommonCExceptionHandler)  @ Call exception handler\r
\r
  ldr       R2,[SP,#0x40]           @ EFI_SYSTEM_CONTEXT_ARM.CPSR\r
  str       R2,[SP,#0x5c]           @ Store it back to srsdb stack slot so it can be restored\r
\r
  ldr       R2,[SP,#0x3c]           @ EFI_SYSTEM_CONTEXT_ARM.PC\r
  str       R2,[SP,#0x58]           @ Store it back to srsdb stack slot so it can be restored\r
\r
  ldmfd     SP!,{R0-R12}            @ Restore general purpose registers\r
                                    @ Exception handler can not change SP or LR as we would blow chunks\r
\r
  add       SP,SP,#0x20             @ Clear out the remaining stack space\r
  ldmfd     SP!,{LR}                @ restore the link register for this context\r
  rfefd     SP!                     @ return from exception via srsdb stack slot\r
Commit	Line	Data
3402aac7	1	#------------------------------------------------------------------------------\r
1e57a462	2	#\r
	3	# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
	4	#\r
	5	# This program and the accompanying materials\r
	6	# are licensed and made available under the terms and conditions of the BSD License\r
	7	# which accompanies this distribution. The full text of the license may be found at\r
	8	# http://opensource.org/licenses/bsd-license.php\r
	9	#\r
	10	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	#\r
	13	#------------------------------------------------------------------------------\r
	14	\r
	15	.text\r
	16	.align 3\r
	17	\r
	18	GCC_ASM_EXPORT(ExceptionHandlersStart)\r
	19	GCC_ASM_EXPORT(ExceptionHandlersEnd)\r
	20	GCC_ASM_EXPORT(CommonExceptionEntry)\r
	21	GCC_ASM_EXPORT(AsmCommonExceptionEntry)\r
	22	GCC_ASM_EXPORT(CommonCExceptionHandler)\r
	23	\r
	24	ASM_PFX(ExceptionHandlersStart):\r
	25	\r
	26	ASM_PFX(Reset):\r
	27	b ASM_PFX(ResetEntry)\r
	28	\r
	29	ASM_PFX(UndefinedInstruction):\r
	30	b ASM_PFX(UndefinedInstructionEntry)\r
	31	\r
	32	ASM_PFX(SoftwareInterrupt):\r
	33	b ASM_PFX(SoftwareInterruptEntry)\r
	34	\r
	35	ASM_PFX(PrefetchAbort):\r
	36	b ASM_PFX(PrefetchAbortEntry)\r
	37	\r
	38	ASM_PFX(DataAbort):\r
	39	b ASM_PFX(DataAbortEntry)\r
	40	\r
	41	ASM_PFX(ReservedException):\r
	42	b ASM_PFX(ReservedExceptionEntry)\r
	43	\r
	44	ASM_PFX(Irq):\r
	45	b ASM_PFX(IrqEntry)\r
	46	\r
	47	ASM_PFX(Fiq):\r
	48	b ASM_PFX(FiqEntry)\r
	49	\r
	50	ASM_PFX(ResetEntry):\r
	51	srsdb #0x13! @ Store return state on SVC stack\r
	52	stmfd SP!,{LR} @ Store the link register for the current mode\r
	53	sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR\r
	54	stmfd SP!,{R0-R12} @ Store the register state\r
3402aac7	55	\r
1e57a462	56	mov R0,#0\r
	57	ldr R1,ASM_PFX(CommonExceptionEntry)\r
	58	bx R1\r
	59	\r
	60	ASM_PFX(UndefinedInstructionEntry):\r
	61	srsdb #0x13! @ Store return state on SVC stack\r
	62	cps #0x13 @ Switch to SVC for common stack\r
	63	stmfd SP!,{LR} @ Store the link register for the current mode\r
	64	sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR\r
	65	stmfd SP!,{R0-R12} @ Store the register state\r
	66	\r
	67	mov r0,#1\r
	68	ldr r1,ASM_PFX(CommonExceptionEntry)\r
	69	bx r1\r
	70	\r
	71	ASM_PFX(SoftwareInterruptEntry):\r
	72	srsdb #0x13! @ Store return state on SVC stack\r
	73	stmfd SP!,{LR} @ Store the link register for the current mode\r
	74	sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR\r
	75	stmfd SP!,{R0-R12} @ Store the register state\r
	76	\r
	77	mov r0,#2\r
	78	ldr r1,ASM_PFX(CommonExceptionEntry)\r
	79	bx r1\r
	80	\r
	81	ASM_PFX(PrefetchAbortEntry):\r
	82	sub LR,LR,#4\r
	83	srsdb #0x13! @ Store return state on SVC stack\r
	84	cps #0x13 @ Switch to SVC for common stack\r
	85	stmfd SP!,{LR} @ Store the link register for the current mode\r
	86	sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR\r
	87	stmfd SP!,{R0-R12} @ Store the register state\r
	88	\r
	89	mov r0,#3\r
	90	ldr r1,ASM_PFX(CommonExceptionEntry)\r
	91	bx r1\r
	92	\r
	93	ASM_PFX(DataAbortEntry):\r
	94	sub LR,LR,#8\r
	95	srsdb #0x13! @ Store return state on SVC stack\r
	96	cps #0x13 @ Switch to SVC for common stack\r
	97	stmfd SP!,{LR} @ Store the link register for the current mode\r
	98	sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR\r
	99	stmfd SP!,{R0-R12} @ Store the register state\r
	100	\r
	101	mov r0,#4\r
	102	ldr r1,ASM_PFX(CommonExceptionEntry)\r
	103	bx r1\r
	104	\r
	105	ASM_PFX(ReservedExceptionEntry):\r
	106	srsdb #0x13! @ Store return state on SVC stack\r
	107	cps #0x13 @ Switch to SVC for common stack\r
	108	stmfd SP!,{LR} @ Store the link register for the current mode\r
	109	sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR\r
	110	stmfd SP!,{R0-R12} @ Store the register state\r
	111	\r
	112	mov r0,#5\r
	113	ldr r1,ASM_PFX(CommonExceptionEntry)\r
	114	bx r1\r
	115	\r
	116	ASM_PFX(IrqEntry):\r
	117	sub LR,LR,#4\r
	118	srsdb #0x13! @ Store return state on SVC stack\r
	119	cps #0x13 @ Switch to SVC for common stack\r
120	stmfd SP!,{LR} @ Store the link register for the current mode\r
121	sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR\r
122	stmfd SP!,{R0-R12} @ Store the register state\r
123	\r
124	mov r0,#6\r
125	ldr r1,ASM_PFX(CommonExceptionEntry)\r
126	bx r1\r
127	\r
128	ASM_PFX(FiqEntry):\r
129	sub LR,LR,#4\r
130	srsdb #0x13! @ Store return state on SVC stack\r
131	cps #0x13 @ Switch to SVC for common stack\r
132	stmfd SP!,{LR} @ Store the link register for the current mode\r
133	sub SP,SP,#0x20 @ Save space for SP, LR, PC, IFAR - CPSR\r
134	stmfd SP!,{R0-R12} @ Store the register state\r
135	\r
136	mov r0,#7\r
137	ldr r1,ASM_PFX(CommonExceptionEntry)\r
138	bx r1\r
139	\r
140	ASM_PFX(CommonExceptionEntry):\r
141	.byte 0x12\r
142	.byte 0x34\r
143	.byte 0x56\r
144	.byte 0x78\r
145	\r
146	ASM_PFX(ExceptionHandlersEnd):\r
147	\r
148	ASM_PFX(AsmCommonExceptionEntry):\r
149	mrc p15, 0, R1, c6, c0, 2 @ Read IFAR\r
3402aac7 RC	150	str R1, [SP, #0x50] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR\r
3402aac7 RC	151	\r
1e57a462	152	mrc p15, 0, R1, c5, c0, 1 @ Read IFSR\r
1e57a462	153	str R1, [SP, #0x4c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR\r
3402aac7	154	\r
1e57a462	155	mrc p15, 0, R1, c6, c0, 0 @ Read DFAR\r
1e57a462	156	str R1, [SP, #0x48] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR\r
3402aac7	157	\r
1e57a462	158	mrc p15, 0, R1, c5, c0, 0 @ Read DFSR\r
1e57a462	159	str R1, [SP, #0x44] @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR\r
3402aac7 RC	160	\r
3402aac7 RC	161	ldr R1, [SP, #0x5c] @ srsdb saved pre-exception CPSR on the stack\r
1e57a462	162	str R1, [SP, #0x40] @ Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR\r
	163	and r1, r1, #0x1f @ Check to see if User or System Mode\r
	164	cmp r1, #0x1f\r
	165	cmpne r1, #0x10\r
	166	add R2, SP, #0x38 @ Store it in EFI_SYSTEM_CONTEXT_ARM.LR\r
	167	ldmneed r2, {lr}^ @ User or System mode, use unbanked register\r
	168	ldmneed r2, {lr} @ All other modes used banked register\r
	169	\r
3402aac7	170	ldr R1, [SP, #0x58] @ PC is the LR pushed by srsdb\r
1e57a462	171	str R1, [SP, #0x3c] @ Store it in EFI_SYSTEM_CONTEXT_ARM.PC\r
3402aac7 RC	172	\r
3402aac7 RC	173	sub R1, SP, #0x60 @ We pused 0x60 bytes on the stack\r
1e57a462	174	str R1, [SP, #0x34] @ Store it in EFI_SYSTEM_CONTEXT_ARM.SP\r
3402aac7 RC	175	\r
3402aac7 RC	176	@ R0 is exception type\r
1e57a462	177	mov R1,SP @ Prepare System Context pointer as an argument for the exception handler\r
1e57a462	178	blx ASM_PFX(CommonCExceptionHandler) @ Call exception handler\r
3402aac7	179	\r
1e57a462	180	ldr R2,[SP,#0x40] @ EFI_SYSTEM_CONTEXT_ARM.CPSR\r
3402aac7	181	str R2,[SP,#0x5c] @ Store it back to srsdb stack slot so it can be restored\r
1e57a462	182	\r
1e57a462	183	ldr R2,[SP,#0x3c] @ EFI_SYSTEM_CONTEXT_ARM.PC\r
3402aac7	184	str R2,[SP,#0x58] @ Store it back to srsdb stack slot so it can be restored\r
1e57a462	185	\r
	186	ldmfd SP!,{R0-R12} @ Restore general purpose registers\r
	187	@ Exception handler can not change SP or LR as we would blow chunks\r
3402aac7	188	\r
1e57a462	189	add SP,SP,#0x20 @ Clear out the remaining stack space\r
	190	ldmfd SP!,{LR} @ restore the link register for this context\r
	191	rfefd SP! @ return from exception via srsdb stack slot\r