Fixed a bug in the HardwareInterrupt handler that would blow the stack if you reenabl...
[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / CpuDxe.c
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1/** @file\r
2\r
3 Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r
4 \r
5 All rights reserved. This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#include "CpuDxe.h"\r
16\r
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17BOOLEAN mInterruptState = FALSE;\r
18\r
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19EFI_STATUS\r
20EFIAPI\r
21CpuFlushCpuDataCache (\r
22 IN EFI_CPU_ARCH_PROTOCOL *This,\r
23 IN EFI_PHYSICAL_ADDRESS Start,\r
24 IN UINT64 Length,\r
25 IN EFI_CPU_FLUSH_TYPE FlushType\r
26 )\r
27{\r
28 switch (FlushType) {\r
29 case EfiCpuFlushTypeWriteBack:\r
8a4d81e6 30 WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r
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31 break;\r
32 case EfiCpuFlushTypeInvalidate:\r
8a4d81e6 33 InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r
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34 break;\r
35 case EfiCpuFlushTypeWriteBackInvalidate:\r
8a4d81e6 36 WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);\r
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37 break;\r
38 default:\r
39 return EFI_INVALID_PARAMETER;\r
40 }\r
41 \r
42 return EFI_SUCCESS;\r
43}\r
44\r
45EFI_STATUS\r
46EFIAPI\r
47CpuEnableInterrupt (\r
48 IN EFI_CPU_ARCH_PROTOCOL *This\r
49 )\r
50{\r
d213712d 51 ArmEnableInterrupts ();\r
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52\r
53 mInterruptState = TRUE;\r
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54 return EFI_SUCCESS;\r
55}\r
56\r
57\r
58EFI_STATUS\r
59EFIAPI\r
60CpuDisableInterrupt (\r
61 IN EFI_CPU_ARCH_PROTOCOL *This\r
62 )\r
63{\r
d213712d 64 ArmDisableInterrupts ();\r
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65\r
66 mInterruptState = FALSE;\r
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67 return EFI_SUCCESS;\r
68}\r
69\r
70EFI_STATUS\r
71EFIAPI\r
72CpuGetInterruptState (\r
73 IN EFI_CPU_ARCH_PROTOCOL *This,\r
74 OUT BOOLEAN *State\r
75 )\r
76{\r
77 if (State == NULL) {\r
78 return EFI_INVALID_PARAMETER;\r
79 }\r
80\r
8a4d81e6 81 *State = mInterruptState;\r
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82 return EFI_SUCCESS;\r
83}\r
84\r
85EFI_STATUS\r
86EFIAPI\r
87CpuInit (\r
88 IN EFI_CPU_ARCH_PROTOCOL *This,\r
89 IN EFI_CPU_INIT_TYPE InitType\r
90 )\r
91{\r
92 return EFI_UNSUPPORTED;\r
93}\r
94\r
95EFI_STATUS\r
96EFIAPI\r
97CpuRegisterInterruptHandler (\r
98 IN EFI_CPU_ARCH_PROTOCOL *This,\r
99 IN EFI_EXCEPTION_TYPE InterruptType,\r
100 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
101 )\r
102{\r
8a4d81e6 103 return RegisterInterruptHandler (InterruptType, InterruptHandler);\r
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104}\r
105\r
106EFI_STATUS\r
107EFIAPI\r
108CpuGetTimerValue (\r
109 IN EFI_CPU_ARCH_PROTOCOL *This,\r
110 IN UINT32 TimerIndex,\r
111 OUT UINT64 *TimerValue,\r
112 OUT UINT64 *TimerPeriod OPTIONAL\r
113 )\r
114{\r
115 return EFI_UNSUPPORTED;\r
116}\r
117\r
118EFI_STATUS\r
119EFIAPI\r
120CpuSetMemoryAttributes (\r
121 IN EFI_CPU_ARCH_PROTOCOL *This,\r
122 IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
123 IN UINT64 Length,\r
124 IN UINT64 Attributes\r
125 )\r
126{\r
127 return EFI_UNSUPPORTED;\r
128}\r
129\r
130//\r
131// Globals used to initialize the protocol\r
132//\r
133EFI_HANDLE mCpuHandle = NULL;\r
134EFI_CPU_ARCH_PROTOCOL mCpu = {\r
135 CpuFlushCpuDataCache,\r
136 CpuEnableInterrupt,\r
137 CpuDisableInterrupt,\r
138 CpuGetInterruptState,\r
139 CpuInit,\r
140 CpuRegisterInterruptHandler,\r
141 CpuGetTimerValue,\r
142 CpuSetMemoryAttributes,\r
143 0, // NumberOfTimers\r
144 4, // DmaBufferAlignment\r
145};\r
146\r
147EFI_STATUS\r
148CpuDxeInitialize (\r
149 IN EFI_HANDLE ImageHandle,\r
150 IN EFI_SYSTEM_TABLE *SystemTable\r
151 )\r
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152{ \r
153 InitializeExceptions (&mCpu); \r
154 return gBS->InstallMultipleProtocolInterfaces (&mCpuHandle, &gEfiCpuArchProtocolGuid, &mCpu, NULL);\r
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155}\r
156\r