projects / mirror_edk2.git / blame
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| 2ef2b01e A |
1 | /** @file\r |
| 2 | Macros to work around lack of Apple support for LDR register, =expr\r | |
| 3 | \r | |
| d6ebcab7 | 4 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
| 2ef2b01e | 5 | \r |
| d6ebcab7 | 6 | This program and the accompanying materials\r |
| 2ef2b01e A |
7 | are licensed and made available under the terms and conditions of the BSD License\r |
| 8 | which accompanies this distribution. The full text of the license may be found at\r | |
| 9 | http://opensource.org/licenses/bsd-license.php\r | |
| 10 | \r | |
| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 13 | \r | |
| 14 | **/\r | |
| 15 | \r | |
| 16 | \r | |
| 17 | #ifndef __MACRO_IO_LIB_H__\r | |
| 18 | #define __MACRO_IO_LIB_H__\r | |
| 19 | \r | |
| 20 | #if defined(__APPLE__)\r | |
| 21 | \r | |
| 22 | //\r | |
| 23 | // ldr reg, =expr does not work with current Apple tool chain. So do the work our selves\r | |
| 24 | //\r | |
| 25 | \r | |
| 26 | // returns _Data in R0 and _Address in R1\r | |
| 27 | #define MmioWrite32(_Address, _Data) \\r | |
| 28 | ldr r1, [pc, #8] ; \\r | |
| 29 | ldr r0, [pc, #8] ; \\r | |
| 30 | str r0, [r1] ; \\r | |
| 31 | b 1f ; \\r | |
| 32 | .long (_Address) ; \\r | |
| 33 | .long (_Data) ; \\r | |
| 34 | 1:\r | |
| 35 | \r | |
| 36 | // returns _Data in R0 and _Address in R1, and _OrData in r2\r | |
| 37 | #define MmioOr32(_Address, _OrData) \\r | |
| 38 | ldr r1, [pc, #16] ; \\r | |
| 39 | ldr r2, [pc, #16] ; \\r | |
| 40 | ldr r0, [r1] ; \\r | |
| 41 | orr r0, r0, r2 ; \\r | |
| 42 | str r0, [r1] ; \\r | |
| 43 | b 1f ; \\r | |
| 44 | .long (_Address) ; \\r | |
| 45 | .long (_OrData) ; \\r | |
| 46 | 1:\r | |
| 47 | \r | |
| 48 | // returns _Data in R0 and _Address in R1, and _OrData in r2\r | |
| 49 | #define MmioAnd32(_Address, _AndData) \\r | |
| 50 | ldr r1, [pc, #16] ; \\r | |
| 51 | ldr r2, [pc, #16] ; \\r | |
| 52 | ldr r0, [r1] ; \\r | |
| 53 | and r0, r0, r2 ; \\r | |
| 54 | str r0, [r1] ; \\r | |
| 55 | b 1f ; \\r | |
| 56 | .long (_Address) ; \\r | |
| 57 | .long (_AndData) ; \\r | |
| 58 | 1:\r | |
| 59 | \r | |
| 60 | // returns result in R0, _Address in R1, and _OrData in r2\r | |
| 61 | #define MmioAndThenOr32(_Address, _AndData, _OrData) \\r | |
| 62 | ldr r1, [pc, #24] ; \\r | |
| 63 | ldr r0, [r1] ; \\r | |
| 64 | ldr r2, [pc, #20] ; \\r | |
| 65 | and r0, r0, r2 ; \\r | |
| 66 | ldr r2, [pc, #16] ; \\r | |
| 67 | orr r0, r0, r2 ; \\r | |
| 68 | str r0, [r1] ; \\r | |
| 69 | b 1f ; \\r | |
| 70 | .long (_Address) ; \\r | |
| 71 | .long (_AndData) ; \\r | |
| 72 | .long (_OrData) ; \\r | |
| 73 | 1:\r | |
| 74 | \r | |
| 75 | // returns _Data in _Reg and _Address in R1\r | |
| 76 | #define MmioWriteFromReg32(_Address, _Reg) \\r | |
| 77 | ldr r1, [pc, #4] ; \\r | |
| 78 | str _Reg, [r1] ; \\r | |
| 79 | b 1f ; \\r | |
| 80 | .long (_Address) ; \\r | |
| 81 | 1:\r | |
| 82 | \r | |
| 83 | \r | |
| 84 | // returns _Data in R0 and _Address in R1\r | |
| 85 | #define MmioRead32(_Address) \\r | |
| 86 | ldr r1, [pc, #4] ; \\r | |
| 87 | ldr r0, [r1] ; \\r | |
| 88 | b 1f ; \\r | |
| 89 | .long (_Address) ; \\r | |
| 90 | 1:\r | |
| 91 | \r | |
| 92 | // returns _Data in Reg and _Address in R1\r | |
| 93 | #define MmioReadToReg32(_Address, _Reg) \\r | |
| 94 | ldr r1, [pc, #4] ; \\r | |
| 95 | ldr _Reg, [r1] ; \\r | |
| 96 | b 1f ; \\r | |
| 97 | .long (_Address) ; \\r | |
| 98 | 1:\r | |
| 99 | \r | |
| 100 | \r | |
| 101 | // load R0 with _Data\r | |
| 102 | #define LoadConstant(_Data) \\r | |
| 103 | ldr r0, [pc, #0] ; \\r | |
| 104 | b 1f ; \\r | |
| 105 | .long (_Data) ; \\r | |
| 106 | 1:\r | |
| 107 | \r | |
| 108 | // load _Reg with _Data\r | |
| 109 | #define LoadConstantToReg(_Data, _Reg) \\r | |
| 110 | ldr _Reg, [pc, #0] ; \\r | |
| 111 | b 1f ; \\r | |
| 112 | .long (_Data) ; \\r | |
| 113 | 1:\r | |
| 114 | \r | |
| 115 | // load _Reg with _Data if eq\r | |
| 116 | #define LoadConstantToRegIfEq(_Data, _Reg) \\r | |
| 117 | ldreq _Reg, [pc, #0] ; \\r | |
| 118 | b 1f ; \\r | |
| 119 | .long (_Data) ; \\r | |
| 120 | 1:\r | |
| 121 | \r | |
| 89bbce11 | 122 | // Convert the (ClusterId,CoreId) into a Core Position\r |
| 123 | // We assume there are 4 cores per cluster\r | |
| 124 | #define GetCorePositionInStack(Pos, MpId, Tmp) \\r | |
| 125 | lsr Pos, MpId, #6 ; \\r | |
| 126 | and Tmp, MpId, #3 ; \\r | |
| 127 | add Pos, Pos, Tmp\r | |
| 128 | \r | |
| 129 | // Reserve a region at the top of the Primary Core stack\r | |
| 130 | // for Global variables for the XIP phase\r | |
| 131 | #define SetPrimaryStack(StackTop, GlobalSize, Tmp) \\r | |
| 132 | and Tmp, GlobalSize, #7 ; \\r | |
| 133 | rsbne Tmp, Tmp, #8 ; \\r | |
| 134 | add GlobalSize, GlobalSize, Tmp ; \\r | |
| 135 | sub sp, StackTop, GlobalSize\r | |
| 136 | \r | |
| 2ef2b01e A |
137 | \r |
| 138 | #elif defined (__GNUC__)\r | |
| 139 | \r | |
| 140 | #define MmioWrite32(Address, Data) \\r | |
| 141 | ldr r1, =Address ; \\r | |
| 142 | ldr r0, =Data ; \\r | |
| 143 | str r0, [r1]\r | |
| 144 | \r | |
| 145 | #define MmioOr32(Address, OrData) \\r | |
| 146 | ldr r1, =Address ; \\r | |
| 147 | ldr r2, =OrData ; \\r | |
| 148 | ldr r0, [r1] ; \\r | |
| 149 | orr r0, r0, r2 ; \\r | |
| 150 | str r0, [r1]\r | |
| 151 | \r | |
| 152 | #define MmioAnd32(Address, AndData) \\r | |
| 153 | ldr r1, =Address ; \\r | |
| 154 | ldr r2, =AndData ; \\r | |
| 155 | ldr r0, [r1] ; \\r | |
| 156 | and r0, r0, r2 ; \\r | |
| 157 | str r0, [r1]\r | |
| 158 | \r | |
| 159 | #define MmioAndThenOr32(Address, AndData, OrData) \\r | |
| 160 | ldr r1, =Address ; \\r | |
| 161 | ldr r0, [r1] ; \\r | |
| 162 | ldr r2, =AndData ; \\r | |
| 163 | and r0, r0, r2 ; \\r | |
| 164 | ldr r2, =OrData ; \\r | |
| 165 | orr r0, r0, r2 ; \\r | |
| 166 | str r0, [r1] \r | |
| 167 | \r | |
| 168 | #define MmioWriteFromReg32(Address, Reg) \\r | |
| 169 | ldr r1, =Address ; \\r | |
| 170 | str Reg, [r1]\r | |
| 171 | \r | |
| 172 | #define MmioRead32(Address) \\r | |
| 173 | ldr r1, =Address ; \\r | |
| 174 | ldr r0, [r1]\r | |
| 175 | \r | |
| 176 | #define MmioReadToReg32(Address, Reg) \\r | |
| 177 | ldr r1, =Address ; \\r | |
| 178 | ldr Reg, [r1]\r | |
| 179 | \r | |
| 180 | #define LoadConstant(Data) \\r | |
| 181 | ldr r0, =Data\r | |
| 182 | \r | |
| 183 | #define LoadConstantToReg(Data, Reg) \\r | |
| 184 | ldr Reg, =Data\r | |
| 185 | \r | |
| 2dbcb8f0 | 186 | #define GetCorePositionInStack(Pos, MpId, Tmp) \\r |
| 187 | lsr Pos, MpId, #6 ; \\r | |
| 188 | and Tmp, MpId, #3 ; \\r | |
| 189 | add Pos, Pos, Tmp\r | |
| 190 | \r | |
| 191 | #define SetPrimaryStack(StackTop, GlobalSize, Tmp) \\r | |
| 192 | and Tmp, GlobalSize, #7 ; \\r | |
| 193 | rsbne Tmp, Tmp, #8 ; \\r | |
| 194 | add GlobalSize, GlobalSize, Tmp ; \\r | |
| 195 | sub sp, StackTop, GlobalSize\r | |
| 196 | \r | |
| 2ef2b01e A |
197 | #else\r |
| 198 | \r | |
| 199 | //\r | |
| 200 | // Use ARM assembly macros, form armasam \r | |
| 201 | //\r | |
| 202 | // Less magic in the macros if ldr reg, =expr works\r | |
| 203 | //\r | |
| 204 | \r | |
| 205 | // returns _Data in R0 and _Address in R1\r | |
| 206 | \r | |
| 207 | \r | |
| 208 | \r | |
| 209 | #define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data\r | |
| 210 | \r | |
| 211 | \r | |
| 212 | \r | |
| 213 | \r | |
| 214 | // returns Data in R0 and Address in R1, and OrData in r2\r | |
| 215 | #define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData\r | |
| 216 | \r | |
| 217 | \r | |
| 218 | // returns _Data in R0 and _Address in R1, and _OrData in r2\r | |
| 219 | \r | |
| 220 | \r | |
| 221 | #define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData\r | |
| 222 | \r | |
| 223 | // returns result in R0, _Address in R1, and _OrData in r2\r | |
| 224 | \r | |
| 225 | \r | |
| 226 | #define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData\r | |
| 227 | \r | |
| 228 | \r | |
| 229 | // returns _Data in _Reg and _Address in R1\r | |
| 230 | \r | |
| 231 | \r | |
| 232 | #define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg\r | |
| 233 | \r | |
| 234 | // returns _Data in R0 and _Address in R1\r | |
| 235 | \r | |
| 236 | \r | |
| 237 | #define MmioRead32(Address) MmioRead32Macro Address\r | |
| 238 | \r | |
| 239 | // returns _Data in Reg and _Address in R1\r | |
| 240 | \r | |
| 241 | \r | |
| 242 | #define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg\r | |
| 243 | \r | |
| 244 | \r | |
| 245 | // load R0 with _Data\r | |
| 246 | \r | |
| 247 | \r | |
| 248 | #define LoadConstant(Data) LoadConstantMacro Data\r | |
| 249 | \r | |
| 250 | // load _Reg with _Data\r | |
| 251 | \r | |
| 252 | \r | |
| 253 | #define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg\r | |
| 254 | \r | |
| 255 | // conditional load testing eq flag\r | |
| 256 | #define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg\r | |
| 257 | \r | |
| 2dbcb8f0 | 258 | #define GetCorePositionInStack(Pos, MpId, Tmp) GetCorePositionInStack Pos, MpId, Tmp\r |
| 2ef2b01e | 259 | \r |
| 2dbcb8f0 | 260 | #define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp\r |
| 2ef2b01e | 261 | \r |
| 2dbcb8f0 | 262 | #endif\r |
| 2ef2b01e A |
263 | \r |
| 264 | #endif\r |