projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 44788bae | 1 | /** @file\r |
| 2 | *\r | |
| 3 | * Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
| 44788bae | 4 | *\r |
| 4059386c | 5 | * SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 44788bae | 6 | *\r |
| 7 | **/\r | |
| 8 | \r | |
| cc15a619 PG |
9 | #ifndef ARM_MP_CORE_INFO_GUID_H_\r |
| 10 | #define ARM_MP_CORE_INFO_GUID_H_\r | |
| 44788bae | 11 | \r |
| 429309e0 MK |
12 | #define MAX_CPUS_PER_MPCORE_SYSTEM 0x04\r |
| 13 | #define SCU_CONFIG_REG_OFFSET 0x04\r | |
| 14 | #define MPIDR_U_BIT_MASK 0x40000000\r | |
| 44788bae | 15 | \r |
| 16 | typedef struct {\r | |
| 103fa647 | 17 | UINT64 Mpidr;\r |
| 44788bae | 18 | \r |
| 19 | // MP Core Mailbox\r | |
| 429309e0 MK |
20 | EFI_PHYSICAL_ADDRESS MailboxSetAddress;\r |
| 21 | EFI_PHYSICAL_ADDRESS MailboxGetAddress;\r | |
| 22 | EFI_PHYSICAL_ADDRESS MailboxClearAddress;\r | |
| 23 | UINT64 MailboxClearValue;\r | |
| 44788bae | 24 | } ARM_CORE_INFO;\r |
| 25 | \r | |
| 429309e0 MK |
26 | typedef struct {\r |
| 27 | UINT64 Signature;\r | |
| 28 | UINT32 Length;\r | |
| 29 | UINT32 Revision;\r | |
| 30 | UINT64 OemId;\r | |
| 31 | UINT64 OemTableId;\r | |
| 32 | UINTN OemRevision;\r | |
| 33 | UINTN CreatorId;\r | |
| 34 | UINTN CreatorRevision;\r | |
| 35 | EFI_GUID Identifier;\r | |
| 36 | UINTN DataLen;\r | |
| 44788bae | 37 | } ARM_PROCESSOR_TABLE_HEADER;\r |
| 38 | \r | |
| 39 | typedef struct {\r | |
| 429309e0 MK |
40 | ARM_PROCESSOR_TABLE_HEADER Header;\r |
| 41 | UINTN NumberOfEntries;\r | |
| 42 | ARM_CORE_INFO *ArmCpus;\r | |
| 44788bae | 43 | } ARM_PROCESSOR_TABLE;\r |
| 44 | \r | |
| 44788bae | 45 | #define ARM_MP_CORE_INFO_GUID \\r |
| 46 | { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }\r | |
| 47 | \r | |
| 429309e0 MK |
48 | #define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')\r |
| 49 | #define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000// 1.0\r | |
| 50 | #define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')\r | |
| 51 | #define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')\r | |
| 52 | #define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001\r | |
| 53 | #define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5\r | |
| 54 | #define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001\r | |
| 44788bae | 55 | \r |
| 429309e0 | 56 | extern EFI_GUID gArmMpCoreInfoGuid;\r |
| 44788bae | 57 | \r |
| cc15a619 | 58 | #endif /* ARM_MP_CORE_INFO_GUID_H_ */\r |