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44788bae | 1 | /** @file\r |
2 | *\r | |
3 | * Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
44788bae | 4 | *\r |
4059386c | 5 | * SPDX-License-Identifier: BSD-2-Clause-Patent\r |
44788bae | 6 | *\r |
7 | **/\r | |
8 | \r | |
cc15a619 PG |
9 | #ifndef ARM_MP_CORE_INFO_GUID_H_\r |
10 | #define ARM_MP_CORE_INFO_GUID_H_\r | |
44788bae | 11 | \r |
12 | #define MAX_CPUS_PER_MPCORE_SYSTEM 0x04\r | |
13 | #define SCU_CONFIG_REG_OFFSET 0x04\r | |
14 | #define MPIDR_U_BIT_MASK 0x40000000\r | |
15 | \r | |
16 | typedef struct {\r | |
17 | UINT32 ClusterId;\r | |
18 | UINT32 CoreId;\r | |
19 | \r | |
20 | // MP Core Mailbox\r | |
21 | EFI_PHYSICAL_ADDRESS MailboxSetAddress;\r | |
22 | EFI_PHYSICAL_ADDRESS MailboxGetAddress;\r | |
23 | EFI_PHYSICAL_ADDRESS MailboxClearAddress;\r | |
24 | UINT64 MailboxClearValue;\r | |
25 | } ARM_CORE_INFO;\r | |
26 | \r | |
27 | typedef struct{\r | |
91c38d4e RC |
28 | UINT64 Signature;\r |
29 | UINT32 Length;\r | |
30 | UINT32 Revision;\r | |
31 | UINT64 OemId;\r | |
32 | UINT64 OemTableId;\r | |
33 | UINTN OemRevision;\r | |
34 | UINTN CreatorId;\r | |
35 | UINTN CreatorRevision;\r | |
36 | EFI_GUID Identifier;\r | |
37 | UINTN DataLen;\r | |
44788bae | 38 | } ARM_PROCESSOR_TABLE_HEADER;\r |
39 | \r | |
40 | typedef struct {\r | |
91c38d4e RC |
41 | ARM_PROCESSOR_TABLE_HEADER Header;\r |
42 | UINTN NumberOfEntries;\r | |
43 | ARM_CORE_INFO *ArmCpus;\r | |
44788bae | 44 | } ARM_PROCESSOR_TABLE;\r |
45 | \r | |
46 | \r | |
47 | #define ARM_MP_CORE_INFO_GUID \\r | |
48 | { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }\r | |
49 | \r | |
50 | #define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')\r | |
51 | #define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000 //1.0\r | |
52 | #define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')\r | |
53 | #define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')\r | |
54 | #define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001\r | |
55 | #define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5\r | |
56 | #define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001\r | |
57 | \r | |
58 | extern EFI_GUID gArmMpCoreInfoGuid;\r | |
59 | \r | |
cc15a619 | 60 | #endif /* ARM_MP_CORE_INFO_GUID_H_ */\r |