Commit | Line | Data |
---|---|---|
1e57a462 | 1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
01674afd | 4 | Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r |
3402aac7 | 5 | \r |
1e57a462 | 6 | This program and the accompanying materials\r |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | #include <Base.h>\r | |
16 | #include <Library/ArmLib.h>\r | |
f977e650 | 17 | #include <Library/DebugLib.h>\r |
1e57a462 | 18 | #include <Library/PcdLib.h>\r |
19 | \r | |
cf580da1 | 20 | STATIC\r |
1e57a462 | 21 | VOID\r |
22 | CacheRangeOperation (\r | |
23 | IN VOID *Start,\r | |
24 | IN UINTN Length,\r | |
cf580da1 AB |
25 | IN LINE_OPERATION LineOperation,\r |
26 | IN UINTN LineLength\r | |
1e57a462 | 27 | )\r |
28 | {\r | |
cf580da1 | 29 | UINTN ArmCacheLineAlignmentMask = LineLength - 1;\r |
3402aac7 | 30 | \r |
6ea34e3a AB |
31 | // Align address (rounding down)\r |
32 | UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r | |
33 | UINTN EndAddress = (UINTN)Start + Length;\r | |
1e57a462 | 34 | \r |
6ea34e3a AB |
35 | // Perform the line operation on an address in each cache line\r |
36 | while (AlignedAddress < EndAddress) {\r | |
37 | LineOperation(AlignedAddress);\r | |
cf580da1 | 38 | AlignedAddress += LineLength;\r |
1e57a462 | 39 | }\r |
c7222893 | 40 | ArmDataSynchronizationBarrier ();\r |
1e57a462 | 41 | }\r |
42 | \r | |
43 | VOID\r | |
44 | EFIAPI\r | |
45 | InvalidateInstructionCache (\r | |
46 | VOID\r | |
47 | )\r | |
48 | {\r | |
ce6aec3e | 49 | ASSERT (FALSE);\r |
1e57a462 | 50 | }\r |
51 | \r | |
52 | VOID\r | |
53 | EFIAPI\r | |
54 | InvalidateDataCache (\r | |
55 | VOID\r | |
56 | )\r | |
57 | {\r | |
f977e650 | 58 | ASSERT (FALSE);\r |
1e57a462 | 59 | }\r |
60 | \r | |
61 | VOID *\r | |
62 | EFIAPI\r | |
63 | InvalidateInstructionCacheRange (\r | |
64 | IN VOID *Address,\r | |
65 | IN UINTN Length\r | |
66 | )\r | |
67 | {\r | |
cf580da1 AB |
68 | CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,\r |
69 | ArmDataCacheLineLength ());\r | |
70 | CacheRangeOperation (Address, Length,\r | |
71 | ArmInvalidateInstructionCacheEntryToPoUByMVA,\r | |
72 | ArmInstructionCacheLineLength ());\r | |
73 | \r | |
74 | ArmInstructionSynchronizationBarrier ();\r | |
75 | \r | |
1e57a462 | 76 | return Address;\r |
77 | }\r | |
78 | \r | |
79 | VOID\r | |
80 | EFIAPI\r | |
81 | WriteBackInvalidateDataCache (\r | |
82 | VOID\r | |
83 | )\r | |
84 | {\r | |
f977e650 | 85 | ASSERT (FALSE);\r |
1e57a462 | 86 | }\r |
87 | \r | |
88 | VOID *\r | |
89 | EFIAPI\r | |
90 | WriteBackInvalidateDataCacheRange (\r | |
91 | IN VOID *Address,\r | |
92 | IN UINTN Length\r | |
93 | )\r | |
94 | {\r | |
cf580da1 AB |
95 | CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,\r |
96 | ArmDataCacheLineLength ());\r | |
1e57a462 | 97 | return Address;\r |
98 | }\r | |
99 | \r | |
100 | VOID\r | |
101 | EFIAPI\r | |
102 | WriteBackDataCache (\r | |
103 | VOID\r | |
104 | )\r | |
105 | {\r | |
f977e650 | 106 | ASSERT (FALSE);\r |
1e57a462 | 107 | }\r |
108 | \r | |
109 | VOID *\r | |
110 | EFIAPI\r | |
111 | WriteBackDataCacheRange (\r | |
112 | IN VOID *Address,\r | |
113 | IN UINTN Length\r | |
114 | )\r | |
115 | {\r | |
cf580da1 AB |
116 | CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,\r |
117 | ArmDataCacheLineLength ());\r | |
1e57a462 | 118 | return Address;\r |
119 | }\r | |
120 | \r | |
121 | VOID *\r | |
122 | EFIAPI\r | |
123 | InvalidateDataCacheRange (\r | |
124 | IN VOID *Address,\r | |
125 | IN UINTN Length\r | |
126 | )\r | |
127 | {\r | |
cf580da1 AB |
128 | CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,\r |
129 | ArmDataCacheLineLength ());\r | |
1e57a462 | 130 | return Address;\r |
131 | }\r |