]> git.proxmox.com Git - mirror_edk2.git/blame - ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
Added support for L2 (4K) page tables and made the CPU driver change cachability...
[mirror_edk2.git] / ArmPkg / Library / ArmCacheMaintenanceLib / ArmCacheMaintenanceLib.c
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1/** @file
2
3 Copyright (c) 2008-2009, Apple Inc. All rights reserved.
4
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13**/
14#include <Base.h>
15#include <Library/ArmLib.h>
16#include <Library/PcdLib.h>
17
18VOID
19CacheRangeOperation (
20 IN VOID *Start,
21 IN UINTN Length,
22 IN CACHE_OPERATION CacheOperation,
23 IN LINE_OPERATION LineOperation
24 )
25{
26 UINTN ArmCacheLineLength = ArmDataCacheLineLength();
27 UINTN ArmCacheLineAlignmentMask = ArmCacheLineLength - 1;
28 UINTN ArmCacheOperationThreshold = PcdGet32(PcdArmCacheOperationThreshold);
29
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30 if ((CacheOperation != NULL) && (Length >= ArmCacheOperationThreshold)) {
31 CacheOperation ();
32 } else {
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33 // Align address (rounding down)
34 UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
35 UINTN EndAddress = (UINTN)Start + Length;
36
37 // Perform the line operation on an address in each cache line
f659880b 38 while (AlignedAddress < EndAddress) {
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39 LineOperation(AlignedAddress);
40 AlignedAddress += ArmCacheLineLength;
41 }
42 }
43}
44
45VOID
46EFIAPI
47InvalidateInstructionCache (
48 VOID
49 )
50{
51 ArmCleanDataCache();
52 ArmInvalidateInstructionCache();
53}
54
55VOID
56EFIAPI
57InvalidateDataCache (
58 VOID
59 )
60{
61 ArmInvalidateDataCache();
62}
63
64VOID *
65EFIAPI
66InvalidateInstructionCacheRange (
67 IN VOID *Address,
68 IN UINTN Length
69 )
70{
71 CacheRangeOperation(Address, Length, ArmCleanDataCache, ArmCleanDataCacheEntryByMVA);
72 ArmInvalidateInstructionCache();
73 return Address;
74}
75
76VOID
77EFIAPI
78WriteBackInvalidateDataCache (
79 VOID
80 )
81{
82 ArmCleanInvalidateDataCache();
83}
84
85VOID *
86EFIAPI
87WriteBackInvalidateDataCacheRange (
88 IN VOID *Address,
89 IN UINTN Length
90 )
91{
92 CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCache, ArmCleanInvalidateDataCacheEntryByMVA);
93 return Address;
94}
95
96VOID
97EFIAPI
98WriteBackDataCache (
99 VOID
100 )
101{
102 ArmCleanDataCache();
103}
104
105VOID *
106EFIAPI
107WriteBackDataCacheRange (
108 IN VOID *Address,
109 IN UINTN Length
110 )
111{
112 CacheRangeOperation(Address, Length, ArmCleanDataCache, ArmCleanDataCacheEntryByMVA);
113 return Address;
114}
115
116VOID *
117EFIAPI
118InvalidateDataCacheRange (
119 IN VOID *Address,
120 IN UINTN Length
121 )
122{
123 CacheRangeOperation(Address, Length, NULL, ArmInvalidateDataCacheEntryByMVA);
124 return Address;
125}