ArmPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / ArmPkg / Library / ArmLib / AArch64 / AArch64ArchTimerSupport.S

#------------------------------------------------------------------------------\r
#\r
# Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.\r
# Copyright (c) 2016, Linaro Limited. All rights reserved.\r
#\r
# SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
#------------------------------------------------------------------------------\r
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#include <AsmMacroIoLibV8.h>\r
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ASM_FUNC(ArmReadCntFrq)\r
  mrs   x0, cntfrq_el0           // Read CNTFRQ\r
  ret\r
\r
\r
# NOTE - Can only write while at highest implemented EL level (EL3 on model). Else ReadOnly (EL2, EL1, EL0)\r
ASM_FUNC(ArmWriteCntFrq)\r
  msr   cntfrq_el0, x0           // Write to CNTFRQ\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntPct)\r
  mrs   x0, cntpct_el0           // Read CNTPCT (Physical counter register)\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntkCtl)\r
  mrs   x0, cntkctl_el1          // Read CNTK_CTL (Timer PL1 Control Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmWriteCntkCtl)\r
  msr   cntkctl_el1, x0          // Write to CNTK_CTL (Timer PL1 Control Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntpTval)\r
  mrs   x0, cntp_tval_el0        // Read CNTP_TVAL (PL1 physical timer value register)\r
  ret\r
\r
\r
ASM_FUNC(ArmWriteCntpTval)\r
  msr   cntp_tval_el0, x0        // Write to CNTP_TVAL (PL1 physical timer value register)\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntpCtl)\r
  mrs   x0, cntp_ctl_el0         // Read CNTP_CTL (PL1 Physical Timer Control Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmWriteCntpCtl)\r
  msr   cntp_ctl_el0, x0         // Write to  CNTP_CTL (PL1 Physical Timer Control Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntvTval)\r
  mrs   x0, cntv_tval_el0        // Read CNTV_TVAL (Virtual Timer Value register)\r
  ret\r
\r
\r
ASM_FUNC(ArmWriteCntvTval)\r
  msr   cntv_tval_el0, x0        // Write to CNTV_TVAL (Virtual Timer Value register)\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntvCtl)\r
  mrs   x0, cntv_ctl_el0         // Read CNTV_CTL (Virtual Timer Control Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmWriteCntvCtl)\r
  msr   cntv_ctl_el0, x0         // Write to CNTV_CTL (Virtual Timer Control Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntvCt)\r
  mrs  x0, cntvct_el0            // Read CNTVCT  (Virtual Count Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntpCval)\r
  mrs   x0, cntp_cval_el0        // Read CNTP_CTVAL (Physical Timer Compare Value Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmWriteCntpCval)\r
  msr   cntp_cval_el0, x0        // Write to CNTP_CTVAL (Physical Timer Compare Value Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntvCval)\r
  mrs   x0, cntv_cval_el0        // Read CNTV_CTVAL (Virtual Timer Compare Value Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmWriteCntvCval)\r
  msr   cntv_cval_el0, x0        // write to  CNTV_CTVAL (Virtual Timer Compare Value Register)\r
  ret\r
\r
\r
ASM_FUNC(ArmReadCntvOff)\r
  mrs   x0, cntvoff_el2          // Read CNTVOFF (virtual Offset register)\r
  ret\r
\r
\r
ASM_FUNC(ArmWriteCntvOff)\r
  msr   cntvoff_el2, x0          // Write to CNTVOFF (Virtual Offset register)\r
  ret\r
\r
\r
ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r