[mirror_edk2.git] / ArmPkg / Library / ArmLib / Arm9 / Arm9Support.S

#------------------------------------------------------------------------------ 
#
# Copyright (c) 2008-2009 Apple Inc. All rights reserved.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution.  The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#------------------------------------------------------------------------------

.text
.align 2
.globl ASM_PFX(ArmCleanInvalidateDataCache)
.globl ASM_PFX(ArmCleanDataCache)
.globl ASM_PFX(ArmInvalidateDataCache)
.globl ASM_PFX(ArmInvalidateInstructionCache)
.globl ASM_PFX(ArmInvalidateDataCacheEntryByMVA)
.globl ASM_PFX(ArmCleanDataCacheEntryByMVA)
.globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
.globl ASM_PFX(ArmEnableMmu)
.globl ASM_PFX(ArmDisableMmu)
.globl ASM_PFX(ArmMmuEnabled)
.globl ASM_PFX(ArmEnableDataCache)
.globl ASM_PFX(ArmDisableDataCache)
.globl ASM_PFX(ArmEnableInstructionCache)
.globl ASM_PFX(ArmDisableInstructionCache)
.globl ASM_PFX(ArmEnableBranchPrediction)
.globl ASM_PFX(ArmDisableBranchPrediction)

.set DC_ON, (1<<2)
.set IC_ON, (1<<12)

#------------------------------------------------------------------------------

ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
  mcr     p15, 0, r0, c7, c6, 1   @ invalidate single data cache line                                           
  bx      lr

ASM_PFX(ArmCleanDataCacheEntryByMVA):
  mcr     p15, 0, r0, c7, c10, 1  @ clean single data cache line     
  bx      lr

ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
  mcr     p15, 0, r0, c7, c14, 1  @ clean and invalidate single data cache line
  bx      lr

ASM_PFX(ArmEnableInstructionCache):
  ldr    r1,=IC_ON
  mrc    p15,0,r0,c1,c0,0     @Read control register configuration data
  orr    r0,r0,r1             @Set I bit
  mcr    p15,0,r0,c1,c0,0     @Write control register configuration data
  bx     LR
	
ASM_PFX(ArmDisableInstructionCache):
  ldr    r1,=IC_ON
  mrc    p15,0,r0,c1,c0,0     @Read control register configuration data
  bic    r0,r0,r1             @Clear I bit.
  mcr    p15,0,r0,c1,c0,0     @Write control register configuration data
  bx     LR
	
ASM_PFX(ArmInvalidateInstructionCache):
  mov     r0,#0
  mcr     p15,0,r0,c7,c5,0     @Invalidate entire Instruction cache. 
	                       @Also flushes the branch target cache.
  mov     r0,#0
  mcr     p15,0,r0,c7,c10,4    @Data write buffer
  bx      LR

ASM_PFX(ArmEnableMmu):
  mrc     p15,0,R0,c1,c0,0
  orr     R0,R0,#1
  mcr     p15,0,R0,c1,c0,0
  bx      LR

ASM_PFX(ArmMmuEnabled):
  mrc     p15,0,R0,c1,c0,0
  and     R0,R0,#1
  bx      LR

ASM_PFX(ArmDisableMmu):
  mrc     p15,0,R0,c1,c0,0
  bic     R0,R0,#1
  mcr     p15,0,R0,c1,c0,0
  mov     R0,#0
  mcr     p15,0,R0,c7,c10,4     @Drain write buffer
  bx      LR

ASM_PFX(ArmEnableDataCache):
  ldr     R1,=DC_ON
  mrc     p15,0,R0,c1,c0,0      @Read control register configuration data
  orr     R0,R0,R1              @Set C bit
  mcr     p15,0,r0,c1,c0,0      @Write control register configuration data
  bx      LR
	
ASM_PFX(ArmDisableDataCache):
  ldr     R1,=DC_ON
  mrc     p15,0,R0,c1,c0,0      @Read control register configuration data
  bic     R0,R0,R1              @Clear C bit
  mcr     p15,0,r0,c1,c0,0      @Write control register configuration data
  bx      LR

ASM_PFX(ArmCleanDataCache):
  mrc     p15,0,r15,c7,c10,3
  bne     ASM_PFX(ArmCleanDataCache)
  mov     R0,#0
  mcr     p15,0,R0,c7,c10,4	@Drain write buffer
  bx      LR
    
ASM_PFX(ArmInvalidateDataCache):
  mov     R0,#0
  mcr     p15,0,R0,c7,c6,0        @Invalidate entire data cache
  mov     R0,#0
  mcr     p15,0,R0,c7,c10,4       @Drain write buffer
  bx      LR

ASM_PFX(ArmCleanInvalidateDataCache):
  mrc     p15,0,r15,c7,c14,3
  bne     ASM_PFX(ArmCleanInvalidateDataCache)
  mov     R0,#0
  mcr     p15,0,R0,c7,c10,4	      @Drain write buffer
  bx      LR

ASM_PFX(ArmEnableBranchPrediction):
  bx      LR                      @Branch prediction is not supported.

ASM_PFX(ArmDisableBranchPrediction):
  bx      LR                      @Branch prediction is not supported.

ASM_FUNCTION_REMOVE_IF_UNREFERENCED
Commit	Line	Data
2ef2b01e A	1	#------------------------------------------------------------------------------
	2	#
	3	# Copyright (c) 2008-2009 Apple Inc. All rights reserved.
	4	#
	5	# All rights reserved. This program and the accompanying materials
	6	# are licensed and made available under the terms and conditions of the BSD License
	7	# which accompanies this distribution. The full text of the license may be found at
	8	# http://opensource.org/licenses/bsd-license.php
	9	#
	10	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
	11	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
	12	#
	13	#------------------------------------------------------------------------------
	14
	15	.text
	16	.align 2
	17	.globl ASM_PFX(ArmCleanInvalidateDataCache)
	18	.globl ASM_PFX(ArmCleanDataCache)
	19	.globl ASM_PFX(ArmInvalidateDataCache)
	20	.globl ASM_PFX(ArmInvalidateInstructionCache)
	21	.globl ASM_PFX(ArmInvalidateDataCacheEntryByMVA)
	22	.globl ASM_PFX(ArmCleanDataCacheEntryByMVA)
	23	.globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
	24	.globl ASM_PFX(ArmEnableMmu)
	25	.globl ASM_PFX(ArmDisableMmu)
c2b5ca8b	26	.globl ASM_PFX(ArmMmuEnabled)
2ef2b01e A	27	.globl ASM_PFX(ArmEnableDataCache)
	28	.globl ASM_PFX(ArmDisableDataCache)
	29	.globl ASM_PFX(ArmEnableInstructionCache)
	30	.globl ASM_PFX(ArmDisableInstructionCache)
	31	.globl ASM_PFX(ArmEnableBranchPrediction)
	32	.globl ASM_PFX(ArmDisableBranchPrediction)
	33
	34	.set DC_ON, (1<<2)
	35	.set IC_ON, (1<<12)
	36
	37	#------------------------------------------------------------------------------
	38
	39	ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
	40	mcr p15, 0, r0, c7, c6, 1 @ invalidate single data cache line
	41	bx lr
	42
	43	ASM_PFX(ArmCleanDataCacheEntryByMVA):
	44	mcr p15, 0, r0, c7, c10, 1 @ clean single data cache line
	45	bx lr
	46
	47	ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
	48	mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate single data cache line
	49	bx lr
	50
	51	ASM_PFX(ArmEnableInstructionCache):
	52	ldr r1,=IC_ON
	53	mrc p15,0,r0,c1,c0,0 @Read control register configuration data
	54	orr r0,r0,r1 @Set I bit
	55	mcr p15,0,r0,c1,c0,0 @Write control register configuration data
	56	bx LR
	57
	58	ASM_PFX(ArmDisableInstructionCache):
	59	ldr r1,=IC_ON
	60	mrc p15,0,r0,c1,c0,0 @Read control register configuration data
	61	bic r0,r0,r1 @Clear I bit.
	62	mcr p15,0,r0,c1,c0,0 @Write control register configuration data
	63	bx LR
	64
	65	ASM_PFX(ArmInvalidateInstructionCache):
	66	mov r0,#0
	67	mcr p15,0,r0,c7,c5,0 @Invalidate entire Instruction cache.
	68	@Also flushes the branch target cache.
	69	mov r0,#0
	70	mcr p15,0,r0,c7,c10,4 @Data write buffer
	71	bx LR
	72
	73	ASM_PFX(ArmEnableMmu):
	74	mrc p15,0,R0,c1,c0,0
	75	orr R0,R0,#1
	76	mcr p15,0,R0,c1,c0,0
	77	bx LR
	78
c2b5ca8b A	79	ASM_PFX(ArmMmuEnabled):
	80	mrc p15,0,R0,c1,c0,0
	81	and R0,R0,#1
	82	bx LR
	83
2ef2b01e A	84	ASM_PFX(ArmDisableMmu):
	85	mrc p15,0,R0,c1,c0,0
	86	bic R0,R0,#1
	87	mcr p15,0,R0,c1,c0,0
	88	mov R0,#0
	89	mcr p15,0,R0,c7,c10,4 @Drain write buffer
	90	bx LR
	91
	92	ASM_PFX(ArmEnableDataCache):
	93	ldr R1,=DC_ON
	94	mrc p15,0,R0,c1,c0,0 @Read control register configuration data
	95	orr R0,R0,R1 @Set C bit
	96	mcr p15,0,r0,c1,c0,0 @Write control register configuration data
	97	bx LR
	98
	99	ASM_PFX(ArmDisableDataCache):
	100	ldr R1,=DC_ON
	101	mrc p15,0,R0,c1,c0,0 @Read control register configuration data
	102	bic R0,R0,R1 @Clear C bit
	103	mcr p15,0,r0,c1,c0,0 @Write control register configuration data
	104	bx LR
	105
	106	ASM_PFX(ArmCleanDataCache):
	107	mrc p15,0,r15,c7,c10,3
	108	bne ASM_PFX(ArmCleanDataCache)
	109	mov R0,#0
	110	mcr p15,0,R0,c7,c10,4 @Drain write buffer
	111	bx LR
	112
	113	ASM_PFX(ArmInvalidateDataCache):
	114	mov R0,#0
	115	mcr p15,0,R0,c7,c6,0 @Invalidate entire data cache
	116	mov R0,#0
	117	mcr p15,0,R0,c7,c10,4 @Drain write buffer
	118	bx LR
	119
	120	ASM_PFX(ArmCleanInvalidateDataCache):
	121	mrc p15,0,r15,c7,c14,3
	122	bne ASM_PFX(ArmCleanInvalidateDataCache)
	123	mov R0,#0
	124	mcr p15,0,R0,c7,c10,4 @Drain write buffer
	125	bx LR
	126
	127	ASM_PFX(ArmEnableBranchPrediction):
	128	bx LR @Branch prediction is not supported.
	129
	130	ASM_PFX(ArmDisableBranchPrediction):
	131	bx LR @Branch prediction is not supported.
	132
	133	ASM_FUNCTION_REMOVE_IF_UNREFERENCED
	134