UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / ArmPkg / Library / ArmLib / ArmLib.c

/** @file\r
\r
  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
  Copyright (c) 2011 - 2021, ARM Ltd. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <Base.h>\r
\r
#include <Library/ArmLib.h>\r
\r
#include "ArmLibPrivate.h"\r
\r
VOID\r
EFIAPI\r
ArmSetAuxCrBit (\r
  IN  UINT32  Bits\r
  )\r
{\r
  ArmWriteAuxCr (ArmReadAuxCr () | Bits);\r
}\r
\r
VOID\r
EFIAPI\r
ArmUnsetAuxCrBit (\r
  IN  UINT32  Bits\r
  )\r
{\r
  ArmWriteAuxCr (ArmReadAuxCr () & ~Bits);\r
}\r
\r
//\r
// Helper functions for accessing CPUACTLR\r
//\r
\r
VOID\r
EFIAPI\r
ArmSetCpuActlrBit (\r
  IN  UINTN  Bits\r
  )\r
{\r
  ArmWriteCpuActlr (ArmReadCpuActlr () | Bits);\r
}\r
\r
VOID\r
EFIAPI\r
ArmUnsetCpuActlrBit (\r
  IN  UINTN  Bits\r
  )\r
{\r
  ArmWriteCpuActlr (ArmReadCpuActlr () & ~Bits);\r
}\r
\r
UINTN\r
EFIAPI\r
ArmDataCacheLineLength (\r
  VOID\r
  )\r
{\r
  return 4 << ((ArmCacheInfo () >> 16) & 0xf); // CTR_EL0.DminLine\r
}\r
\r
UINTN\r
EFIAPI\r
ArmInstructionCacheLineLength (\r
  VOID\r
  )\r
{\r
  return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine\r
}\r
\r
UINTN\r
EFIAPI\r
ArmCacheWritebackGranule (\r
  VOID\r
  )\r
{\r
  UINTN  CWG;\r
\r
  CWG = (ArmCacheInfo () >> 24) & 0xf; // CTR_EL0.CWG\r
\r
  if (CWG == 0) {\r
    return SIZE_2KB;\r
  }\r
\r
  return 4 << CWG;\r
}\r