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1 | //------------------------------------------------------------------------------\r |
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2 | //\r |
| 3 | // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
| 4 | //\r |
| 5 | // This program and the accompanying materials\r |
| 6 | // are licensed and made available under the terms and conditions of the BSD License\r |
| 7 | // which accompanies this distribution. The full text of the license may be found at\r |
| 8 | // http://opensource.org/licenses/bsd-license.php\r |
| 9 | //\r |
| 10 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 11 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| 12 | //\r |
| 13 | //------------------------------------------------------------------------------\r |
| 14 | \r |
| 15 | \r |
| 16 | EXPORT __aeabi_uidiv\r |
| 17 | EXPORT __aeabi_uidivmod\r |
| 18 | EXPORT __aeabi_idiv\r |
| 19 | EXPORT __aeabi_idivmod\r |
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20 | \r |
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21 | AREA Math, CODE, READONLY\r |
| 22 | \r |
| 23 | ;\r |
| 24 | ;UINT32\r |
| 25 | ;EFIAPI\r |
| 26 | ;__aeabi_uidivmode (\r |
| 27 | ; IN UINT32 Dividen\r |
| 28 | ; IN UINT32 Divisor\r |
| 29 | ; );\r |
| 30 | ;\r |
| 31 | \r |
| 32 | __aeabi_uidiv\r |
| 33 | __aeabi_uidivmod\r |
| 34 | RSBS r12, r1, r0, LSR #4\r |
| 35 | MOV r2, #0\r |
| 36 | BCC __arm_div4\r |
| 37 | RSBS r12, r1, r0, LSR #8\r |
| 38 | BCC __arm_div8\r |
| 39 | MOV r3, #0\r |
| 40 | B __arm_div_large\r |
| 41 | \r |
| 42 | ;\r |
| 43 | ;INT32\r |
| 44 | ;EFIAPI\r |
| 45 | ;__aeabi_idivmode (\r |
| 46 | ; IN INT32 Dividen\r |
| 47 | ; IN INT32 Divisor\r |
| 48 | ; );\r |
| 49 | ;\r |
| 50 | __aeabi_idiv\r |
| 51 | __aeabi_idivmod\r |
| 52 | ORRS r12, r0, r1\r |
| 53 | BMI __arm_div_negative\r |
| 54 | RSBS r12, r1, r0, LSR #1\r |
| 55 | MOV r2, #0\r |
| 56 | BCC __arm_div1\r |
| 57 | RSBS r12, r1, r0, LSR #4\r |
| 58 | BCC __arm_div4\r |
| 59 | RSBS r12, r1, r0, LSR #8\r |
| 60 | BCC __arm_div8\r |
| 61 | MOV r3, #0\r |
| 62 | B __arm_div_large\r |
| 63 | __arm_div8\r |
| 64 | RSBS r12, r1, r0, LSR #7\r |
| 65 | SUBCS r0, r0, r1, LSL #7\r |
| 66 | ADC r2, r2, r2\r |
| 67 | RSBS r12, r1, r0,LSR #6\r |
| 68 | SUBCS r0, r0, r1, LSL #6\r |
| 69 | ADC r2, r2, r2\r |
| 70 | RSBS r12, r1, r0, LSR #5\r |
| 71 | SUBCS r0, r0, r1, LSL #5\r |
| 72 | ADC r2, r2, r2\r |
| 73 | RSBS r12, r1, r0, LSR #4\r |
| 74 | SUBCS r0, r0, r1, LSL #4\r |
| 75 | ADC r2, r2, r2\r |
| 76 | __arm_div4\r |
| 77 | RSBS r12, r1, r0, LSR #3\r |
| 78 | SUBCS r0, r0, r1, LSL #3\r |
| 79 | ADC r2, r2, r2\r |
| 80 | RSBS r12, r1, r0, LSR #2\r |
| 81 | SUBCS r0, r0, r1, LSL #2\r |
| 82 | ADCS r2, r2, r2\r |
| 83 | RSBS r12, r1, r0, LSR #1\r |
| 84 | SUBCS r0, r0, r1, LSL #1\r |
| 85 | ADC r2, r2, r2\r |
| 86 | __arm_div1\r |
| 87 | SUBS r1, r0, r1\r |
| 88 | MOVCC r1, r0\r |
| 89 | ADC r0, r2, r2\r |
| 90 | BX r14\r |
| 91 | __arm_div_negative\r |
| 92 | ANDS r2, r1, #0x80000000\r |
| 93 | RSBMI r1, r1, #0\r |
| 94 | EORS r3, r2, r0, ASR #32\r |
| 95 | RSBCS r0, r0, #0\r |
| 96 | RSBS r12, r1, r0, LSR #4\r |
| 97 | BCC label1\r |
| 98 | RSBS r12, r1, r0, LSR #8\r |
| 99 | BCC label2\r |
| 100 | __arm_div_large\r |
| 101 | LSL r1, r1, #6\r |
| 102 | RSBS r12, r1, r0, LSR #8\r |
| 103 | ORR r2, r2, #0xfc000000\r |
| 104 | BCC label2\r |
| 105 | LSL r1, r1, #6\r |
| 106 | RSBS r12, r1, r0, LSR #8\r |
| 107 | ORR r2, r2, #0x3f00000\r |
| 108 | BCC label2\r |
| 109 | LSL r1, r1, #6\r |
| 110 | RSBS r12, r1, r0, LSR #8\r |
| 111 | ORR r2, r2, #0xfc000\r |
| 112 | ORRCS r2, r2, #0x3f00\r |
| 113 | LSLCS r1, r1, #6\r |
| 114 | RSBS r12, r1, #0\r |
| 115 | BCS __aeabi_idiv0\r |
| 116 | label3\r |
| 117 | LSRCS r1, r1, #6\r |
| 118 | label2\r |
| 119 | RSBS r12, r1, r0, LSR #7\r |
| 120 | SUBCS r0, r0, r1, LSL #7\r |
| 121 | ADC r2, r2, r2\r |
| 122 | RSBS r12, r1, r0, LSR #6\r |
| 123 | SUBCS r0, r0, r1, LSL #6\r |
| 124 | ADC r2, r2, r2\r |
| 125 | RSBS r12, r1, r0, LSR #5\r |
| 126 | SUBCS r0, r0, r1, LSL #5\r |
| 127 | ADC r2, r2, r2\r |
| 128 | RSBS r12, r1, r0, LSR #4\r |
| 129 | SUBCS r0, r0, r1, LSL #4\r |
| 130 | ADC r2, r2, r2\r |
| 131 | label1\r |
| 132 | RSBS r12, r1, r0, LSR #3\r |
| 133 | SUBCS r0, r0, r1, LSL #3\r |
| 134 | ADC r2, r2, r2\r |
| 135 | RSBS r12, r1, r0, LSR #2\r |
| 136 | SUBCS r0, r0, r1, LSL #2\r |
| 137 | ADCS r2, r2, r2\r |
| 138 | BCS label3\r |
| 139 | RSBS r12, r1, r0, LSR #1\r |
| 140 | SUBCS r0, r0, r1, LSL #1\r |
| 141 | ADC r2, r2, r2\r |
| 142 | SUBS r1, r0, r1\r |
| 143 | MOVCC r1, r0\r |
| 144 | ADC r0, r2, r2\r |
| 145 | ASRS r3, r3, #31\r |
| 146 | RSBMI r0, r0, #0\r |
| 147 | RSBCS r1, r1, #0\r |
| 148 | BX r14\r |
| 149 | \r |
| 150 | ; What to do about division by zero? For now, just return.\r |
| 151 | __aeabi_idiv0\r |
| 152 | BX r14\r |
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153 | \r |
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154 | END\r |
| 155 | \r |
projects / mirror_edk2.git / blame