projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 3402aac7 | 1 | //------------------------------------------------------------------------------\r |
| 1e57a462 | 2 | //\r |
| 3 | // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
| e58427e3 | 4 | // Copyright (c) 2018, Pete Batard. All rights reserved.<BR>\r |
| 1e57a462 | 5 | //\r |
| 6 | // This program and the accompanying materials\r | |
| 7 | // are licensed and made available under the terms and conditions of the BSD License\r | |
| 8 | // which accompanies this distribution. The full text of the license may be found at\r | |
| 9 | // http://opensource.org/licenses/bsd-license.php\r | |
| 10 | //\r | |
| 11 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 12 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 13 | //\r | |
| 14 | //------------------------------------------------------------------------------\r | |
| 15 | \r | |
| 16 | \r | |
| e58427e3 PB |
17 | EXPORT __aeabi_uldivmod\r |
| 18 | EXPORT __rt_udiv64\r | |
| 1e57a462 | 19 | \r |
| e58427e3 | 20 | AREA s___aeabi_uldivmod, CODE, READONLY, ARM\r |
| 1e57a462 | 21 | \r |
| e58427e3 PB |
22 | ARM\r |
| 23 | \r | |
| 24 | ;\r | |
| 25 | ;UINT64\r | |
| 26 | ;EFIAPI\r | |
| 27 | ;__rt_udiv64 (\r | |
| 28 | ; IN UINT64 Divisor\r | |
| 29 | ; IN UINT64 Dividend\r | |
| 30 | ; )\r | |
| 31 | ;\r | |
| 32 | __rt_udiv64\r | |
| 33 | ; Swap r0-r1 and r2-r3\r | |
| 34 | mov r12, r0\r | |
| 35 | mov r0, r2\r | |
| 36 | mov r2, r12\r | |
| 37 | mov r12, r1\r | |
| 38 | mov r1, r3\r | |
| 39 | mov r3, r12\r | |
| 40 | b __aeabi_uldivmod\r | |
| 1e57a462 | 41 | \r |
| 3402aac7 | 42 | ;\r |
| 1e57a462 | 43 | ;UINT64\r |
| 44 | ;EFIAPI\r | |
| 45 | ;__aeabi_uldivmod (\r | |
| 3402aac7 | 46 | ; IN UINT64 Dividend\r |
| 1e57a462 | 47 | ; IN UINT64 Divisor\r |
| 48 | ; )\r | |
| 49 | ;\r | |
| e58427e3 | 50 | __aeabi_uldivmod\r |
| 1e57a462 | 51 | stmdb sp!, {r4, r5, r6, lr}\r |
| 52 | mov r4, r1\r | |
| 53 | mov r5, r0\r | |
| 54 | mov r6, #0 ; 0x0\r | |
| 55 | orrs ip, r3, r2, lsr #31\r | |
| 56 | bne __aeabi_uldivmod_label1\r | |
| 57 | tst r2, r2\r | |
| 58 | beq _ll_div0\r | |
| 59 | movs ip, r2, lsr #15\r | |
| 60 | addeq r6, r6, #16 ; 0x10\r | |
| 61 | mov ip, r2, lsl r6\r | |
| 62 | movs lr, ip, lsr #23\r | |
| 63 | moveq ip, ip, lsl #8\r | |
| 64 | addeq r6, r6, #8 ; 0x8\r | |
| 65 | movs lr, ip, lsr #27\r | |
| 66 | moveq ip, ip, lsl #4\r | |
| 67 | addeq r6, r6, #4 ; 0x4\r | |
| 68 | movs lr, ip, lsr #29\r | |
| 69 | moveq ip, ip, lsl #2\r | |
| 70 | addeq r6, r6, #2 ; 0x2\r | |
| 71 | movs lr, ip, lsr #30\r | |
| 72 | moveq ip, ip, lsl #1\r | |
| 73 | addeq r6, r6, #1 ; 0x1\r | |
| 74 | b _ll_udiv_small\r | |
| 75 | __aeabi_uldivmod_label1\r | |
| 76 | tst r3, #-2147483648 ; 0x80000000\r | |
| 77 | bne __aeabi_uldivmod_label2\r | |
| 78 | movs ip, r3, lsr #15\r | |
| 79 | addeq r6, r6, #16 ; 0x10\r | |
| 80 | mov ip, r3, lsl r6\r | |
| 81 | movs lr, ip, lsr #23\r | |
| 82 | moveq ip, ip, lsl #8\r | |
| 83 | addeq r6, r6, #8 ; 0x8\r | |
| 84 | movs lr, ip, lsr #27\r | |
| 85 | moveq ip, ip, lsl #4\r | |
| 86 | addeq r6, r6, #4 ; 0x4\r | |
| 87 | movs lr, ip, lsr #29\r | |
| 88 | moveq ip, ip, lsl #2\r | |
| 89 | addeq r6, r6, #2 ; 0x2\r | |
| 90 | movs lr, ip, lsr #30\r | |
| 91 | addeq r6, r6, #1 ; 0x1\r | |
| 92 | rsb r3, r6, #32 ; 0x20\r | |
| 93 | moveq ip, ip, lsl #1\r | |
| 94 | orr ip, ip, r2, lsr r3\r | |
| 95 | mov lr, r2, lsl r6\r | |
| 96 | b _ll_udiv_big\r | |
| 97 | __aeabi_uldivmod_label2\r | |
| 98 | mov ip, r3\r | |
| 99 | mov lr, r2\r | |
| 100 | b _ll_udiv_ginormous\r | |
| 3402aac7 | 101 | \r |
| 1e57a462 | 102 | _ll_udiv_small\r |
| 103 | cmp r4, ip, lsl #1\r | |
| 104 | mov r3, #0 ; 0x0\r | |
| 105 | subcs r4, r4, ip, lsl #1\r | |
| 106 | addcs r3, r3, #2 ; 0x2\r | |
| 107 | cmp r4, ip\r | |
| 108 | subcs r4, r4, ip\r | |
| 109 | adcs r3, r3, #0 ; 0x0\r | |
| 110 | add r2, r6, #32 ; 0x20\r | |
| 111 | cmp r2, #32 ; 0x20\r | |
| 112 | rsb ip, ip, #0 ; 0x0\r | |
| 113 | bcc _ll_udiv_small_label1\r | |
| 114 | orrs r0, r4, r5, lsr #30\r | |
| 115 | moveq r4, r5\r | |
| 116 | moveq r5, #0 ; 0x0\r | |
| 117 | subeq r2, r2, #32 ; 0x20\r | |
| 118 | _ll_udiv_small_label1\r | |
| 119 | mov r1, #0 ; 0x0\r | |
| 120 | cmp r2, #16 ; 0x10\r | |
| 121 | bcc _ll_udiv_small_label2\r | |
| 122 | movs r0, r4, lsr #14\r | |
| 123 | moveq r4, r4, lsl #16\r | |
| 124 | addeq r1, r1, #16 ; 0x10\r | |
| 125 | _ll_udiv_small_label2\r | |
| 126 | sub lr, r2, r1\r | |
| 127 | cmp lr, #8 ; 0x8\r | |
| 128 | bcc _ll_udiv_small_label3\r | |
| 129 | movs r0, r4, lsr #22\r | |
| 130 | moveq r4, r4, lsl #8\r | |
| 131 | addeq r1, r1, #8 ; 0x8\r | |
| 132 | _ll_udiv_small_label3\r | |
| 133 | rsb r0, r1, #32 ; 0x20\r | |
| 134 | sub r2, r2, r1\r | |
| 135 | orr r4, r4, r5, lsr r0\r | |
| 136 | mov r5, r5, lsl r1\r | |
| 137 | cmp r2, #1 ; 0x1\r | |
| 138 | bcc _ll_udiv_small_label5\r | |
| 139 | sub r2, r2, #1 ; 0x1\r | |
| 140 | and r0, r2, #7 ; 0x7\r | |
| 141 | eor r0, r0, #7 ; 0x7\r | |
| 142 | adds r0, r0, r0, lsl #1\r | |
| 143 | add pc, pc, r0, lsl #2\r | |
| 144 | nop ; (mov r0,r0)\r | |
| 145 | _ll_udiv_small_label4\r | |
| 146 | adcs r5, r5, r5\r | |
| 147 | adcs r4, ip, r4, lsl #1\r | |
| 148 | rsbcc r4, ip, r4\r | |
| 149 | adcs r5, r5, r5\r | |
| 150 | adcs r4, ip, r4, lsl #1\r | |
| 151 | rsbcc r4, ip, r4\r | |
| 152 | adcs r5, r5, r5\r | |
| 153 | adcs r4, ip, r4, lsl #1\r | |
| 154 | rsbcc r4, ip, r4\r | |
| 155 | adcs r5, r5, r5\r | |
| 156 | adcs r4, ip, r4, lsl #1\r | |
| 157 | rsbcc r4, ip, r4\r | |
| 158 | adcs r5, r5, r5\r | |
| 159 | adcs r4, ip, r4, lsl #1\r | |
| 160 | rsbcc r4, ip, r4\r | |
| 161 | adcs r5, r5, r5\r | |
| 162 | adcs r4, ip, r4, lsl #1\r | |
| 163 | rsbcc r4, ip, r4\r | |
| 164 | adcs r5, r5, r5\r | |
| 165 | adcs r4, ip, r4, lsl #1\r | |
| 166 | rsbcc r4, ip, r4\r | |
| 167 | adcs r5, r5, r5\r | |
| 168 | adcs r4, ip, r4, lsl #1\r | |
| 169 | sub r2, r2, #8 ; 0x8\r | |
| 170 | tst r2, r2\r | |
| 171 | rsbcc r4, ip, r4\r | |
| 172 | bpl _ll_udiv_small_label4\r | |
| 173 | _ll_udiv_small_label5\r | |
| 174 | mov r2, r4, lsr r6\r | |
| 175 | bic r4, r4, r2, lsl r6\r | |
| 176 | adcs r0, r5, r5\r | |
| 177 | adc r1, r4, r4\r | |
| 178 | add r1, r1, r3, lsl r6\r | |
| 179 | mov r3, #0 ; 0x0\r | |
| 180 | ldmia sp!, {r4, r5, r6, pc}\r | |
| 3402aac7 | 181 | \r |
| 1e57a462 | 182 | _ll_udiv_big\r |
| 183 | subs r0, r5, lr\r | |
| 184 | mov r3, #0 ; 0x0\r | |
| 185 | sbcs r1, r4, ip\r | |
| 186 | movcs r5, r0\r | |
| 187 | movcs r4, r1\r | |
| 188 | adcs r3, r3, #0 ; 0x0\r | |
| 189 | subs r0, r5, lr\r | |
| 190 | sbcs r1, r4, ip\r | |
| 191 | movcs r5, r0\r | |
| 192 | movcs r4, r1\r | |
| 193 | adcs r3, r3, #0 ; 0x0\r | |
| 194 | subs r0, r5, lr\r | |
| 195 | sbcs r1, r4, ip\r | |
| 196 | movcs r5, r0\r | |
| 197 | movcs r4, r1\r | |
| 198 | adcs r3, r3, #0 ; 0x0\r | |
| 199 | mov r1, #0 ; 0x0\r | |
| 200 | rsbs lr, lr, #0 ; 0x0\r | |
| 201 | rsc ip, ip, #0 ; 0x0\r | |
| 202 | cmp r6, #16 ; 0x10\r | |
| 203 | bcc _ll_udiv_big_label1\r | |
| 204 | movs r0, r4, lsr #14\r | |
| 205 | moveq r4, r4, lsl #16\r | |
| 206 | addeq r1, r1, #16 ; 0x10\r | |
| 207 | _ll_udiv_big_label1\r | |
| 208 | sub r2, r6, r1\r | |
| 209 | cmp r2, #8 ; 0x8\r | |
| 210 | bcc _ll_udiv_big_label2\r | |
| 211 | movs r0, r4, lsr #22\r | |
| 212 | moveq r4, r4, lsl #8\r | |
| 213 | addeq r1, r1, #8 ; 0x8\r | |
| 214 | _ll_udiv_big_label2\r | |
| 215 | rsb r0, r1, #32 ; 0x20\r | |
| 216 | sub r2, r6, r1\r | |
| 217 | orr r4, r4, r5, lsr r0\r | |
| 218 | mov r5, r5, lsl r1\r | |
| 219 | cmp r2, #1 ; 0x1\r | |
| 220 | bcc _ll_udiv_big_label4\r | |
| 221 | sub r2, r2, #1 ; 0x1\r | |
| 222 | and r0, r2, #3 ; 0x3\r | |
| 223 | rsb r0, r0, #3 ; 0x3\r | |
| 224 | adds r0, r0, r0, lsl #1\r | |
| 225 | add pc, pc, r0, lsl #3\r | |
| 226 | nop ; (mov r0,r0)\r | |
| 227 | _ll_udiv_big_label3\r | |
| 228 | adcs r5, r5, r5\r | |
| 229 | adcs r4, r4, r4\r | |
| 230 | adcs r0, lr, r5\r | |
| 231 | adcs r1, ip, r4\r | |
| 232 | movcs r5, r0\r | |
| 233 | movcs r4, r1\r | |
| 234 | adcs r5, r5, r5\r | |
| 235 | adcs r4, r4, r4\r | |
| 236 | adcs r0, lr, r5\r | |
| 237 | adcs r1, ip, r4\r | |
| 238 | movcs r5, r0\r | |
| 239 | movcs r4, r1\r | |
| 240 | adcs r5, r5, r5\r | |
| 241 | adcs r4, r4, r4\r | |
| 242 | adcs r0, lr, r5\r | |
| 243 | adcs r1, ip, r4\r | |
| 244 | movcs r5, r0\r | |
| 245 | movcs r4, r1\r | |
| 246 | sub r2, r2, #4 ; 0x4\r | |
| 247 | adcs r5, r5, r5\r | |
| 248 | adcs r4, r4, r4\r | |
| 249 | adcs r0, lr, r5\r | |
| 250 | adcs r1, ip, r4\r | |
| 251 | tst r2, r2\r | |
| 252 | movcs r5, r0\r | |
| 253 | movcs r4, r1\r | |
| 254 | bpl _ll_udiv_big_label3\r | |
| 255 | _ll_udiv_big_label4\r | |
| 256 | mov r1, #0 ; 0x0\r | |
| 257 | mov r2, r5, lsr r6\r | |
| 258 | bic r5, r5, r2, lsl r6\r | |
| 259 | adcs r0, r5, r5\r | |
| 260 | adc r1, r1, #0 ; 0x0\r | |
| 261 | movs lr, r3, lsl r6\r | |
| 262 | mov r3, r4, lsr r6\r | |
| 263 | bic r4, r4, r3, lsl r6\r | |
| 264 | adc r1, r1, #0 ; 0x0\r | |
| 265 | adds r0, r0, lr\r | |
| 266 | orr r2, r2, r4, ror r6\r | |
| 267 | adc r1, r1, #0 ; 0x0\r | |
| 268 | ldmia sp!, {r4, r5, r6, pc}\r | |
| 3402aac7 | 269 | \r |
| 1e57a462 | 270 | _ll_udiv_ginormous\r |
| 271 | subs r2, r5, lr\r | |
| 272 | mov r1, #0 ; 0x0\r | |
| 273 | sbcs r3, r4, ip\r | |
| 274 | adc r0, r1, r1\r | |
| 275 | movcc r2, r5\r | |
| 276 | movcc r3, r4\r | |
| 277 | ldmia sp!, {r4, r5, r6, pc}\r | |
| 3402aac7 | 278 | \r |
| 1e57a462 | 279 | _ll_div0\r |
| 280 | ldmia sp!, {r4, r5, r6, lr}\r | |
| 281 | mov r0, #0 ; 0x0\r | |
| 282 | mov r1, #0 ; 0x0\r | |
| 283 | b __aeabi_ldiv0\r | |
| 3402aac7 | 284 | \r |
| 1e57a462 | 285 | __aeabi_ldiv0\r |
| e58427e3 | 286 | bx r14\r |
| 1e57a462 | 287 | \r |
| 288 | END\r |