projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| e6f3ed43 LL |
1 | //\r |
| 2 | // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
| 3 | // \r | |
| 4 | // This program and the accompanying materials\r | |
| 5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
| 6 | // which accompanies this distribution. The full text of the license may be found at\r | |
| 7 | // http://opensource.org/licenses/bsd-license.php\r | |
| 8 | //\r | |
| 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 11 | //\r | |
| 12 | \r | |
| 13 | error = continue\r | |
| 14 | unload\r | |
| 15 | error = abort\r | |
| 16 | \r | |
| 17 | setreg @CP15_CONTROL = 0x0005107E\r | |
| 18 | setreg @cpsr=0x000000D3\r | |
| 19 | \r | |
| 20 | ; General clock settings.\r | |
| 21 | setmem /32 0x48307270=0x00000080\r | |
| 22 | setmem /32 0x48306D40=0x00000003\r | |
| 23 | setmem /32 0x48005140=0x03020A50\r | |
| 24 | \r | |
| 25 | ;Clock configuration\r | |
| 26 | setmem /32 0x48004A40=0x0000030A\r | |
| 27 | setmem /32 0x48004C40=0x00000015\r | |
| 28 | \r | |
| 29 | ;DPLL3 (Core) settings\r | |
| 30 | setmem /32 0x48004D00=0x00370037\r | |
| 31 | setmem /32 0x48004D30=0x00000000\r | |
| 32 | setmem /32 0x48004D40=0x094C0C00\r | |
| 33 | \r | |
| 34 | ;DPLL4 (Peripheral) settings\r | |
| 35 | setmem /32 0x48004D00=0x00370037\r | |
| 36 | setmem /32 0x48004D30=0x00000000\r | |
| 37 | setmem /32 0x48004D44=0x0001B00C\r | |
| 38 | setmem /32 0x48004D48=0x00000009\r | |
| 39 | \r | |
| 40 | ;DPLL1 (MPU) settings\r | |
| 41 | setmem /32 0x48004904=0x00000037\r | |
| 42 | setmem /32 0x48004934=0x00000000\r | |
| 43 | setmem /32 0x48004940=0x0011F40C\r | |
| 44 | setmem /32 0x48004944=0x00000001\r | |
| 45 | setmem /32 0x48004948=0x00000000\r | |
| 46 | \r | |
| 47 | ;RAM setup.\r | |
| 48 | setmem /16 0x6D000010=0x0000\r | |
| 49 | setmem /16 0x6D000040=0x0001\r | |
| 50 | setmem /16 0x6D000044=0x0100\r | |
| 51 | setmem /16 0x6D000048=0x0000\r | |
| 52 | setmem /32 0x6D000060=0x0000000A\r | |
| 53 | setmem /32 0x6D000070=0x00000081\r | |
| 54 | setmem /16 0x6D000040=0x0003\r | |
| 55 | setmem /32 0x6D000080=0x02D04011\r | |
| 56 | setmem /16 0x6D000084=0x0032\r | |
| 57 | setmem /16 0x6D00008C=0x0000\r | |
| 58 | setmem /32 0x6D00009C=0xBA9DC4C6\r | |
| 59 | setmem /32 0x6D0000A0=0x00012522\r | |
| 60 | setmem /32 0x6D0000A4=0x0004E201\r | |
| 61 | setmem /16 0x6D000040=0x0003\r | |
| 62 | setmem /32 0x6D0000B0=0x02D04011\r | |
| 63 | setmem /16 0x6D0000B4=0x0032\r | |
| 64 | setmem /16 0x6D0000BC=0x0000\r | |
| 65 | setmem /32 0x6D0000C4=0xBA9DC4C6\r | |
| 66 | setmem /32 0x6D0000C8=0x00012522\r | |
| 1d5d0ae9 | 67 | setmem /32 0x6D0000D4=0x0004E201 |