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ArmPkg: Create MpCoreInfo PPI and HOB to describe CPU Cores on a MPCore platform
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1d5d0ae9 1# FLASH layout file for ARM VE.
2#
3# Copyright (c) 2011, ARM Limited. All rights reserved.
4#
5# This program and the accompanying materials
6# are licensed and made available under the terms and conditions of the BSD License
7# which accompanies this distribution. The full text of the license may be found at
8# http://opensource.org/licenses/bsd-license.php
9#
10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12#
13
14################################################################################
15#
16# FD Section
17# The [FD] Section is made up of the definition statements and a
18# description of what goes into the Flash Device Image. Each FD section
19# defines one flash "device" image. A flash device image may be one of
20# the following: Removable media bootable image (like a boot floppy
21# image,) an Option ROM image (that would be "flashed" into an add-in
22# card,) a System "Flash" image (that would be burned into a system's
23# flash) or an Update ("Capsule") image that will be used to update and
24# existing system flash.
25#
26################################################################################
27
28[FD.Sec_ArmVExpress_EFI]
29BaseAddress = 0x44000000|gArmTokenSpaceGuid.PcdSecureFdBaseAddress #The base address of the Secure FLASH Device.
1ad14bc8 30Size = 0x00080000|gArmTokenSpaceGuid.PcdSecureFdSize #The size in bytes of the Secure FLASH Device
1d5d0ae9 31ErasePolarity = 1
32BlockSize = 0x00001000
1ad14bc8 33NumBlocks = 0x80
1d5d0ae9 34
35################################################################################
36#
37# Following are lists of FD Region layout which correspond to the locations of different
38# images within the flash device.
39#
40# Regions must be defined in ascending order and may not overlap.
41#
42# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
43# the pipe "|" character, followed by the size of the region, also in hex with the leading
44# "0x" characters. Like:
45# Offset|Size
46# PcdOffsetCName|PcdSizeCName
47# RegionType <FV, DATA, or FILE>
48#
49################################################################################
50
1ad14bc8 510x00000000|0x00080000
52gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvBaseSize
1d5d0ae9 53FV = FVMAIN_SEC
54
55
56[FD.ArmVExpress_EFI]
57!if $(EDK2_ARMVE_STANDALONE) == 1
f92b93c9 58BaseAddress = 0x45000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
1d5d0ae9 59!else
f92b93c9 60BaseAddress = 0x80000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in remapped DRAM.
1d5d0ae9 61!endif
f92b93c9 62Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
1d5d0ae9 63ErasePolarity = 1
64
65# This one is tricky, it must be: BlockSize * NumBlocks = Size
66BlockSize = 0x00001000
67NumBlocks = 0x200
68
69################################################################################
70#
71# Following are lists of FD Region layout which correspond to the locations of different
72# images within the flash device.
73#
74# Regions must be defined in ascending order and may not overlap.
75#
76# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
77# the pipe "|" character, followed by the size of the region, also in hex with the leading
78# "0x" characters. Like:
79# Offset|Size
80# PcdOffsetCName|PcdSizeCName
81# RegionType <FV, DATA, or FILE>
82#
83################################################################################
84
850x00000000|0x00200000
f92b93c9 86gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvBaseSize
1d5d0ae9 87FV = FVMAIN_COMPACT
88
89
1d5d0ae9 90################################################################################
91#
92# FV Section
93#
94# [FV] section is used to define what components or modules are placed within a flash
95# device file. This section also defines order the components and modules are positioned
96# within the image. The [FV] section consists of define statements, set statements and
97# module statements.
98#
99################################################################################
100
101[FV.FVMAIN_SEC]
102FvAlignment = 8
103ERASE_POLARITY = 1
104MEMORY_MAPPED = TRUE
105STICKY_WRITE = TRUE
106LOCK_CAP = TRUE
107LOCK_STATUS = TRUE
108WRITE_DISABLED_CAP = TRUE
109WRITE_ENABLED_CAP = TRUE
110WRITE_STATUS = TRUE
111WRITE_LOCK_CAP = TRUE
112WRITE_LOCK_STATUS = TRUE
113READ_DISABLED_CAP = TRUE
114READ_ENABLED_CAP = TRUE
115READ_STATUS = TRUE
116READ_LOCK_CAP = TRUE
117READ_LOCK_STATUS = TRUE
118
119 INF ArmPlatformPkg/Sec/Sec.inf
120
121
122[FV.FvMain]
123BlockSize = 0x40
124NumBlocks = 0 # This FV gets compressed so make it just big enough
125FvAlignment = 8 # FV alignment and FV attributes setting.
126ERASE_POLARITY = 1
127MEMORY_MAPPED = TRUE
128STICKY_WRITE = TRUE
129LOCK_CAP = TRUE
130LOCK_STATUS = TRUE
131WRITE_DISABLED_CAP = TRUE
132WRITE_ENABLED_CAP = TRUE
133WRITE_STATUS = TRUE
134WRITE_LOCK_CAP = TRUE
135WRITE_LOCK_STATUS = TRUE
136READ_DISABLED_CAP = TRUE
137READ_ENABLED_CAP = TRUE
138READ_STATUS = TRUE
139READ_LOCK_CAP = TRUE
140READ_LOCK_STATUS = TRUE
141
142 INF MdeModulePkg/Core/Dxe/DxeMain.inf
143
144 #
145 # PI DXE Drivers producing Architectural Protocols (EFI Services)
146 #
147 INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
148 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
149 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
1d5d0ae9 150 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
151 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
152 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
1ad14bc8 153 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
1d5d0ae9 154 INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
155 INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
156 INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
936eff09 157
158 #
159 # Multiple Console IO support
160 #
161 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
162 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
163 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
164 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
165 INF EmbeddedPkg/SerialDxe/SerialDxe.inf
1d5d0ae9 166
167 INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
168 INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
d5e12da4 169 INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
7d0f2f23 170 INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
33e7c2ab 171 INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
1d5d0ae9 172
173 #
174 # Semi-hosting filesystem
175 #
176 INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
177
178 #
179 # FAT filesystem + GPT/MBR partitioning
180 #
181 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
182 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
183 INF FatPkg/EnhancedFatDxe/Fat.inf
184 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
185
186 #
187 # Multimedia Card Interface
188 #
ce73d60a 189 INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
5cc45b70 190 INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
1d5d0ae9 191
192 #
193 # UEFI application (Shell Embedded Boot Loader)
194 #
195 INF EmbeddedPkg/Ebl/Ebl.inf
196
197 #
198 # Bds
199 #
200 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
201 INF ArmPlatformPkg/Bds/Bds.inf
202
203
204[FV.FVMAIN_COMPACT]
205FvAlignment = 8
206ERASE_POLARITY = 1
207MEMORY_MAPPED = TRUE
208STICKY_WRITE = TRUE
209LOCK_CAP = TRUE
210LOCK_STATUS = TRUE
211WRITE_DISABLED_CAP = TRUE
212WRITE_ENABLED_CAP = TRUE
213WRITE_STATUS = TRUE
214WRITE_LOCK_CAP = TRUE
215WRITE_LOCK_STATUS = TRUE
216READ_DISABLED_CAP = TRUE
217READ_ENABLED_CAP = TRUE
218READ_STATUS = TRUE
219READ_LOCK_CAP = TRUE
220READ_LOCK_STATUS = TRUE
221
64e03133 222!if $(EDK2_SKIP_PEICORE) == 1
223 INF ArmPlatformPkg/PrePi/PeiMPCore.inf
224!else
1d5d0ae9 225 INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
226 INF MdeModulePkg/Core/Pei/PeiMain.inf
64e03133 227 INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
228 INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
44788bae 229 INF ArmPkg/Drivers/CpuPei/CpuPei.inf
1d5d0ae9 230 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
231 INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
232 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
233 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
64e03133 234!endif
1d5d0ae9 235
236 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
237 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
238 SECTION FV_IMAGE = FVMAIN
239 }
240 }
241
242
243################################################################################
244#
245# Rules are use with the [FV] section's module INF type to define
246# how an FFS file is created for a given INF file. The following Rule are the default
247# rules for the different module type. User can add the customized rules to define the
248# content of the FFS file.
249#
250################################################################################
251
252
253############################################################################
254# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
255############################################################################
256#
257#[Rule.Common.DXE_DRIVER]
258# FILE DRIVER = $(NAMED_GUID) {
6740ea74 259# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1d5d0ae9 260# COMPRESS PI_STD {
261# GUIDED {
6740ea74 262# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 263# UI STRING="$(MODULE_NAME)" Optional
264# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
265# }
266# }
267# }
268#
269############################################################################
270
271[Rule.Common.SEC]
272 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
6740ea74 273 TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 274 }
275
276[Rule.Common.PEI_CORE]
277 FILE PEI_CORE = $(NAMED_GUID) {
6740ea74 278 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 279 UI STRING ="$(MODULE_NAME)" Optional
280 }
281
282[Rule.Common.PEIM]
283 FILE PEIM = $(NAMED_GUID) {
6740ea74 284 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
285 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 286 UI STRING="$(MODULE_NAME)" Optional
287 }
288
289[Rule.Common.PEIM.TIANOCOMPRESSED]
290 FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
6740ea74 291 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1d5d0ae9 292 GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
6740ea74 293 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 294 UI STRING="$(MODULE_NAME)" Optional
295 }
296 }
297
298[Rule.Common.DXE_CORE]
299 FILE DXE_CORE = $(NAMED_GUID) {
6740ea74 300 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 301 UI STRING="$(MODULE_NAME)" Optional
302 }
303
304[Rule.Common.UEFI_DRIVER]
305 FILE DRIVER = $(NAMED_GUID) {
6740ea74 306 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
307 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 308 UI STRING="$(MODULE_NAME)" Optional
309 }
310
311[Rule.Common.DXE_DRIVER]
312 FILE DRIVER = $(NAMED_GUID) {
6740ea74 313 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
314 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 315 UI STRING="$(MODULE_NAME)" Optional
316 }
317
318[Rule.Common.DXE_RUNTIME_DRIVER]
319 FILE DRIVER = $(NAMED_GUID) {
6740ea74 320 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
321 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 322 UI STRING="$(MODULE_NAME)" Optional
323 }
324
325[Rule.Common.UEFI_APPLICATION]
326 FILE APPLICATION = $(NAMED_GUID) {
327 UI STRING ="$(MODULE_NAME)" Optional
6740ea74 328 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1d5d0ae9 329 }