[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / ArmVExpress-RTSM-AEMv8Ax4.fdf

#\r
#  Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
#\r
#  This program and the accompanying materials\r
#  are licensed and made available under the terms and conditions of the BSD License\r
#  which accompanies this distribution.  The full text of the license may be found at\r
#  http://opensource.org/licenses/bsd-license.php\r
#\r
#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
\r
################################################################################\r
#\r
# FD Section\r
# The [FD] Section is made up of the definition statements and a\r
# description of what goes into  the Flash Device Image.  Each FD section\r
# defines one flash "device" image.  A flash device image may be one of\r
# the following: Removable media bootable image (like a boot floppy\r
# image,) an Option ROM image (that would be "flashed" into an add-in\r
# card,) a System "Flash"  image (that would be burned into a system's\r
# flash) or an Update ("Capsule") image that will be used to update and\r
# existing system flash.\r
#\r
################################################################################\r
\r
[FD.RTSM_VE_AEMv8_EFI]\r
BaseAddress   = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.\r
Size          = 0x00300000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device\r
ErasePolarity = 1\r
\r
# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
BlockSize     = 0x00001000\r
NumBlocks     = 0x300\r
\r
################################################################################\r
#\r
# Following are lists of FD Region layout which correspond to the locations of different\r
# images within the flash device.\r
#\r
# Regions must be defined in ascending order and may not overlap.\r
#\r
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
# "0x" characters. Like:\r
# Offset|Size\r
# PcdOffsetCName|PcdSizeCName\r
# RegionType <FV, DATA, or FILE>\r
#\r
################################################################################\r
\r
0x00000000|0x00080000\r
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize\r
FV = FVMAIN_SEC\r
\r
0x00080000|0x00280000\r
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize\r
FV = FVMAIN_COMPACT\r
\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
\r
[FV.FVMAIN_SEC]\r
FvBaseAddress      = 0x0\r
FvForceRebase      = TRUE\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
  INF ArmPlatformPkg/Sec/Sec.inf\r
\r
\r
[FV.FvMain]\r
BlockSize          = 0x40\r
NumBlocks          = 0         # This FV gets compressed so make it just big enough\r
FvAlignment        = 16        # FV alignment and FV attributes setting.\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
  INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
\r
  #\r
  # PI DXE Drivers producing Architectural Protocols (EFI Services)\r
  #\r
  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
\r
  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
\r
  #\r
  # Multiple Console IO support\r
  #\r
  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
  INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
\r
  INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
\r
  #\r
  # Semi-hosting filesystem\r
  #\r
  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
\r
  #\r
  # FAT filesystem + GPT/MBR partitioning\r
  #\r
  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
  INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
\r
  #\r
  # Multimedia Card Interface\r
  #\r
  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
  INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
\r
  #\r
  # Platform Driver\r
  #\r
  INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r
  INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
\r
  #\r
  # UEFI application (Shell Embedded Boot Loader)\r
  #\r
  INF ShellBinPkg/UefiShell/UefiShell.inf\r
\r
  #\r
  # Bds\r
  #\r
  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
  INF ArmPlatformPkg/Bds/Bds.inf\r
\r
\r
[FV.FVMAIN_COMPACT]\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
!if $(EDK2_SKIP_PEICORE) == 1\r
  INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
!else\r
  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
  INF MdeModulePkg/Core/Pei/PeiMain.inf\r
  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
  INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
!endif\r
\r
  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
      SECTION FV_IMAGE = FVMAIN\r
    }\r
  }\r
\r
\r
################################################################################\r
#\r
# Rules are use with the [FV] section's module INF type to define\r
# how an FFS file is created for a given INF file. The following Rule are the default\r
# rules for the different module type. User can add the customized rules to define the\r
# content of the FFS file.\r
#\r
################################################################################\r
\r
\r
############################################################################\r
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   #\r
############################################################################\r
#\r
#[Rule.Common.DXE_DRIVER]\r
#  FILE DRIVER = $(NAMED_GUID) {\r
#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
#    COMPRESS PI_STD {\r
#      GUIDED {\r
#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
#        UI       STRING="$(MODULE_NAME)" Optional\r
#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
#      }\r
#    }\r
#  }\r
#\r
############################################################################\r
\r
[Rule.Common.SEC]\r
  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
    TE  TE Align = 4K                  $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
\r
[Rule.Common.PEI_CORE]\r
  FILE PEI_CORE = $(NAMED_GUID) {\r
    TE     TE Align = 8                 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI     STRING ="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.PEIM]\r
  FILE PEIM = $(NAMED_GUID) {\r
     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
     TE       TE Align = 8              $(INF_OUTPUT)/$(MODULE_NAME).efi\r
     UI       STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.PEIM.TIANOCOMPRESSED]\r
  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi\r
      UI        STRING="$(MODULE_NAME)" Optional\r
    }\r
  }\r
\r
[Rule.Common.DXE_CORE]\r
  FILE DXE_CORE = $(NAMED_GUID) {\r
    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.DXE_RUNTIME_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI           STRING="$(MODULE_NAME)" Optional\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    UI     STRING ="$(MODULE_NAME)"     Optional\r
    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi\r
  }\r
\r
[Rule.Common.UEFI_DRIVER.BINARY]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX DXE_DEPEX Optional      |.depex\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION.BINARY]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    PE32      PE32                    |.efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
Commit	Line	Data
27be3601	1	#\r
6d0ca257	2	# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
27be3601 HL	3	#\r
	4	# This program and the accompanying materials\r
	5	# are licensed and made available under the terms and conditions of the BSD License\r
	6	# which accompanies this distribution. The full text of the license may be found at\r
	7	# http://opensource.org/licenses/bsd-license.php\r
	8	#\r
	9	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	11	#\r
	12	\r
	13	################################################################################\r
	14	#\r
	15	# FD Section\r
	16	# The [FD] Section is made up of the definition statements and a\r
	17	# description of what goes into the Flash Device Image. Each FD section\r
	18	# defines one flash "device" image. A flash device image may be one of\r
	19	# the following: Removable media bootable image (like a boot floppy\r
	20	# image,) an Option ROM image (that would be "flashed" into an add-in\r
	21	# card,) a System "Flash" image (that would be burned into a system's\r
	22	# flash) or an Update ("Capsule") image that will be used to update and\r
	23	# existing system flash.\r
	24	#\r
	25	################################################################################\r
	26	\r
	27	[FD.RTSM_VE_AEMv8_EFI]\r
	28	BaseAddress = 0x00000000\|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.\r
	29	Size = 0x00300000\|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device\r
	30	ErasePolarity = 1\r
	31	\r
	32	# This one is tricky, it must be: BlockSize * NumBlocks = Size\r
	33	BlockSize = 0x00001000\r
	34	NumBlocks = 0x300\r
	35	\r
	36	################################################################################\r
	37	#\r
	38	# Following are lists of FD Region layout which correspond to the locations of different\r
	39	# images within the flash device.\r
	40	#\r
	41	# Regions must be defined in ascending order and may not overlap.\r
	42	#\r
	43	# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
	44	# the pipe "\|" character, followed by the size of the region, also in hex with the leading\r
	45	# "0x" characters. Like:\r
	46	# Offset\|Size\r
	47	# PcdOffsetCName\|PcdSizeCName\r
	48	# RegionType <FV, DATA, or FILE>\r
	49	#\r
	50	################################################################################\r
	51	\r
	52	0x00000000\|0x00080000\r
	53	gArmTokenSpaceGuid.PcdSecureFvBaseAddress\|gArmTokenSpaceGuid.PcdSecureFvSize\r
	54	FV = FVMAIN_SEC\r
	55	\r
	56	0x00080000\|0x00280000\r
	57	gArmTokenSpaceGuid.PcdFvBaseAddress\|gArmTokenSpaceGuid.PcdFvSize\r
	58	FV = FVMAIN_COMPACT\r
	59	\r
	60	\r
	61	################################################################################\r
	62	#\r
	63	# FV Section\r
	64	#\r
	65	# [FV] section is used to define what components or modules are placed within a flash\r
	66	# device file. This section also defines order the components and modules are positioned\r
67	# within the image. The [FV] section consists of define statements, set statements and\r
68	# module statements.\r
69	#\r
70	################################################################################\r
71	\r
72	[FV.FVMAIN_SEC]\r
73	FvBaseAddress = 0x0\r
74	FvForceRebase = TRUE\r
75	FvAlignment = 16\r
76	ERASE_POLARITY = 1\r
77	MEMORY_MAPPED = TRUE\r
78	STICKY_WRITE = TRUE\r
79	LOCK_CAP = TRUE\r
80	LOCK_STATUS = TRUE\r
81	WRITE_DISABLED_CAP = TRUE\r
82	WRITE_ENABLED_CAP = TRUE\r
83	WRITE_STATUS = TRUE\r
84	WRITE_LOCK_CAP = TRUE\r
85	WRITE_LOCK_STATUS = TRUE\r
86	READ_DISABLED_CAP = TRUE\r
87	READ_ENABLED_CAP = TRUE\r
88	READ_STATUS = TRUE\r
89	READ_LOCK_CAP = TRUE\r
90	READ_LOCK_STATUS = TRUE\r
91	\r
92	INF ArmPlatformPkg/Sec/Sec.inf\r
93	\r
94	\r
95	[FV.FvMain]\r
96	BlockSize = 0x40\r
97	NumBlocks = 0 # This FV gets compressed so make it just big enough\r
98	FvAlignment = 16 # FV alignment and FV attributes setting.\r
99	ERASE_POLARITY = 1\r
100	MEMORY_MAPPED = TRUE\r
101	STICKY_WRITE = TRUE\r
102	LOCK_CAP = TRUE\r
103	LOCK_STATUS = TRUE\r
104	WRITE_DISABLED_CAP = TRUE\r
105	WRITE_ENABLED_CAP = TRUE\r
106	WRITE_STATUS = TRUE\r
107	WRITE_LOCK_CAP = TRUE\r
108	WRITE_LOCK_STATUS = TRUE\r
109	READ_DISABLED_CAP = TRUE\r
110	READ_ENABLED_CAP = TRUE\r
111	READ_STATUS = TRUE\r
112	READ_LOCK_CAP = TRUE\r
113	READ_LOCK_STATUS = TRUE\r
114	\r
115	INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
116	\r
117	#\r
118	# PI DXE Drivers producing Architectural Protocols (EFI Services)\r
119	#\r
120	INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
121	INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
122	INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
123	INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
124	INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
125	INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
126	INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
127	INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
128	INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
129	INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
130	\r
131	INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
132	\r
133	#\r
134	# Multiple Console IO support\r
135	#\r
136	INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
137	INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
138	INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
139	INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
140	INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
141	\r
017baa1c	142	INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
27be3601 HL	143	INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
	144	INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf\r
	145	INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf\r
	146	INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf\r
	147	\r
	148	#\r
	149	# Semi-hosting filesystem\r
	150	#\r
	151	INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
	152	\r
	153	#\r
	154	# FAT filesystem + GPT/MBR partitioning\r
	155	#\r
	156	INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
	157	INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
	158	INF FatBinPkg/EnhancedFatDxe/Fat.inf\r
	159	INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
	160	\r
	161	#\r
	162	# Multimedia Card Interface\r
	163	#\r
	164	INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf\r
	165	INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf\r
62d441fb RC	166	\r
	167	#\r
	168	# Platform Driver\r
	169	#\r
	170	INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf\r
	171	INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf\r
	172	\r
27be3601 HL	173	#\r
	174	# UEFI application (Shell Embedded Boot Loader)\r
	175	#\r
	176	INF ShellBinPkg/UefiShell/UefiShell.inf\r
3402aac7	177	\r
27be3601 HL	178	#\r
	179	# Bds\r
	180	#\r
	181	INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
	182	INF ArmPlatformPkg/Bds/Bds.inf\r
	183	\r
	184	\r
	185	[FV.FVMAIN_COMPACT]\r
	186	FvAlignment = 16\r
	187	ERASE_POLARITY = 1\r
	188	MEMORY_MAPPED = TRUE\r
	189	STICKY_WRITE = TRUE\r
	190	LOCK_CAP = TRUE\r
	191	LOCK_STATUS = TRUE\r
	192	WRITE_DISABLED_CAP = TRUE\r
	193	WRITE_ENABLED_CAP = TRUE\r
	194	WRITE_STATUS = TRUE\r
	195	WRITE_LOCK_CAP = TRUE\r
	196	WRITE_LOCK_STATUS = TRUE\r
	197	READ_DISABLED_CAP = TRUE\r
	198	READ_ENABLED_CAP = TRUE\r
	199	READ_STATUS = TRUE\r
	200	READ_LOCK_CAP = TRUE\r
	201	READ_LOCK_STATUS = TRUE\r
	202	\r
	203	!if $(EDK2_SKIP_PEICORE) == 1\r
	204	INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
	205	!else\r
	206	INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
	207	INF MdeModulePkg/Core/Pei/PeiMain.inf\r
	208	INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
	209	INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
	210	INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
	211	INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
	212	INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
	213	INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
	214	INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
	215	!endif\r
3402aac7	216	\r
27be3601 HL	217	FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
	218	SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
	219	SECTION FV_IMAGE = FVMAIN\r
	220	}\r
	221	}\r
	222	\r
	223	\r
	224	################################################################################\r
	225	#\r
	226	# Rules are use with the [FV] section's module INF type to define\r
	227	# how an FFS file is created for a given INF file. The following Rule are the default\r
	228	# rules for the different module type. User can add the customized rules to define the\r
	229	# content of the FFS file.\r
	230	#\r
	231	################################################################################\r
	232	\r
	233	\r
	234	############################################################################\r
	235	# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #\r
	236	############################################################################\r
	237	#\r
	238	#[Rule.Common.DXE_DRIVER]\r
	239	# FILE DRIVER = $(NAMED_GUID) {\r
	240	# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	241	# COMPRESS PI_STD {\r
	242	# GUIDED {\r
	243	# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	244	# UI STRING="$(MODULE_NAME)" Optional\r
	245	# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	246	# }\r
	247	# }\r
	248	# }\r
	249	#\r
	250	############################################################################\r
	251	\r
	252	[Rule.Common.SEC]\r
	253	FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
6d0ca257	254	TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
27be3601 HL	255	}\r
	256	\r
	257	[Rule.Common.PEI_CORE]\r
	258	FILE PEI_CORE = $(NAMED_GUID) {\r
	259	TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	260	UI STRING ="$(MODULE_NAME)" Optional\r
	261	}\r
	262	\r
	263	[Rule.Common.PEIM]\r
	264	FILE PEIM = $(NAMED_GUID) {\r
	265	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	266	TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	267	UI STRING="$(MODULE_NAME)" Optional\r
	268	}\r
	269	\r
	270	[Rule.Common.PEIM.TIANOCOMPRESSED]\r
	271	FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
	272	PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	273	GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
	274	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	275	UI STRING="$(MODULE_NAME)" Optional\r
	276	}\r
	277	}\r
	278	\r
	279	[Rule.Common.DXE_CORE]\r
	280	FILE DXE_CORE = $(NAMED_GUID) {\r
	281	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	282	UI STRING="$(MODULE_NAME)" Optional\r
	283	}\r
	284	\r
	285	[Rule.Common.UEFI_DRIVER]\r
	286	FILE DRIVER = $(NAMED_GUID) {\r
	287	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	288	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	289	UI STRING="$(MODULE_NAME)" Optional\r
	290	}\r
	291	\r
	292	[Rule.Common.DXE_DRIVER]\r
	293	FILE DRIVER = $(NAMED_GUID) {\r
	294	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	295	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	296	UI STRING="$(MODULE_NAME)" Optional\r
	297	}\r
	298	\r
	299	[Rule.Common.DXE_RUNTIME_DRIVER]\r
	300	FILE DRIVER = $(NAMED_GUID) {\r
	301	DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
	302	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	303	UI STRING="$(MODULE_NAME)" Optional\r
	304	}\r
	305	\r
	306	[Rule.Common.UEFI_APPLICATION]\r
	307	FILE APPLICATION = $(NAMED_GUID) {\r
	308	UI STRING ="$(MODULE_NAME)" Optional\r
	309	PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
	310	}\r
	311	\r
	312	[Rule.Common.UEFI_DRIVER.BINARY]\r
	313	FILE DRIVER = $(NAMED_GUID) {\r
	314	DXE_DEPEX DXE_DEPEX Optional \|.depex\r
	315	PE32 PE32 \|.efi\r
	316	UI STRING="$(MODULE_NAME)" Optional\r
	317	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
	318	}\r
319	\r
320	[Rule.Common.UEFI_APPLICATION.BINARY]\r
321	FILE APPLICATION = $(NAMED_GUID) {\r
322	PE32 PE32 \|.efi\r
323	UI STRING="$(MODULE_NAME)" Optional\r
324	VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
325	}\r