projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 295c2eb8 | 1 | //\r |
| bebda7ce | 2 | // Copyright (c) 2012-2013, ARM Limited. All rights reserved.\r |
| 295c2eb8 | 3 | //\r |
| 4 | // This program and the accompanying materials\r | |
| 5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
| 6 | // which accompanies this distribution. The full text of the license may be found at\r | |
| 7 | // http://opensource.org/licenses/bsd-license.php\r | |
| 8 | //\r | |
| 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 11 | //\r | |
| 12 | //\r | |
| 13 | \r | |
| bebda7ce | 14 | #include <AsmMacroIoLib.h>\r |
| 295c2eb8 | 15 | #include <Library/ArmLib.h>\r |
| 16 | \r | |
| bebda7ce | 17 | #include <ArmPlatform.h>\r |
| 18 | \r | |
| 3402aac7 | 19 | .text\r |
| b5a57223 | 20 | .align 2\r |
| 295c2eb8 | 21 | \r |
| b5a57223 | 22 | GCC_ASM_EXPORT(ArmPlatformPeiBootAction)\r |
| 295c2eb8 | 23 | GCC_ASM_EXPORT(ArmPlatformGetCorePosition)\r |
| bebda7ce | 24 | GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r |
| 99267097 | 25 | GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)\r |
| 295c2eb8 | 26 | \r |
| b5a57223 | 27 | ASM_PFX(ArmPlatformPeiBootAction):\r |
| 28 | bx lr\r | |
| 29 | \r | |
| 295c2eb8 | 30 | //UINTN\r |
| 31 | //ArmPlatformGetCorePosition (\r | |
| 32 | // IN UINTN MpId\r | |
| 33 | // );\r | |
| 34 | ASM_PFX(ArmPlatformGetCorePosition):\r | |
| 35 | and r1, r0, #ARM_CORE_MASK\r | |
| 36 | and r0, r0, #ARM_CLUSTER_MASK\r | |
| 37 | add r0, r1, r0, LSR #7\r | |
| 38 | bx lr\r | |
| 39 | \r | |
| bebda7ce | 40 | //UINTN\r |
| 41 | //ArmPlatformIsPrimaryCore (\r | |
| 42 | // IN UINTN MpId\r | |
| 43 | // );\r | |
| 44 | ASM_PFX(ArmPlatformIsPrimaryCore):\r | |
| 45 | // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48\r | |
| 46 | // with cpu_id[0:3] and cluster_id[4:7]\r | |
| 47 | LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)\r | |
| 48 | ldr r1, [r1]\r | |
| 49 | lsr r1, #24\r | |
| 50 | \r | |
| 51 | // Shift the SCC value to get the cluster ID at the offset #8\r | |
| 52 | lsl r2, r1, #4\r | |
| 53 | and r2, r2, #0xF00\r | |
| 54 | \r | |
| 55 | // Keep only the cpu ID from the original SCC\r | |
| 56 | and r1, r1, #0x0F\r | |
| 57 | // Add the Cluster ID to the Cpu ID\r | |
| 58 | orr r1, r1, r2\r | |
| 59 | \r | |
| 60 | // Keep the Cluster ID and Core ID from the MPID\r | |
| 61 | LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)\r | |
| 62 | and r0, r0, r2\r | |
| 63 | \r | |
| 64 | // Compare mpid and boot cpu from ARM_SCC_CFGREG48\r | |
| 65 | cmp r0, r1\r | |
| 66 | moveq r0, #1\r | |
| 67 | movne r0, #0\r | |
| 68 | bx lr\r | |
| 69 | \r | |
| 99267097 OM |
70 | //UINTN\r |
| 71 | //ArmPlatformGetPrimaryCoreMpId (\r | |
| 72 | // VOID\r | |
| 73 | // );\r | |
| 74 | ASM_PFX(ArmPlatformGetPrimaryCoreMpId):\r | |
| 75 | // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48\r | |
| 76 | // with cpu_id[0:3] and cluster_id[4:7]\r | |
| 77 | LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)\r | |
| 78 | ldr r0, [r0]\r | |
| 79 | lsr r0, #24\r | |
| 80 | \r | |
| 81 | // Shift the SCC value to get the cluster ID at the offset #8\r | |
| 82 | lsl r1, r0, #4\r | |
| 83 | and r1, r1, #0xF00\r | |
| 84 | \r | |
| 85 | // Keep only the cpu ID from the original SCC\r | |
| 86 | and r0, r0, #0x0F\r | |
| 87 | // Add the Cluster ID to the Cpu ID\r | |
| 88 | orr r0, r0, r1\r | |
| 89 | bx lr\r |