ArmPlatformPkg: remove ArmPlatformInitializeSystemMemory

[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / Library / ArmVExpressLibRTSM / RTSM.c

/** @file\r
*\r
*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
*\r
*  This program and the accompanying materials\r
*  are licensed and made available under the terms and conditions of the BSD License\r
*  which accompanies this distribution.  The full text of the license may be found at\r
*  http://opensource.org/licenses/bsd-license.php\r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
\r
#include <Library/IoLib.h>\r
#include <Library/ArmPlatformLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PcdLib.h>\r
\r
#include <Ppi/ArmMpCoreInfo.h>\r
\r
#include <ArmPlatform.h>\r
\r
/**\r
  Return the core per cluster. The method may differ per core type\r
\r
  This function might be called from assembler before any stack is set.\r
\r
  @return   Return the core count per cluster\r
\r
**/\r
UINTN\r
ArmGetCpuCountPerCluster (\r
  VOID\r
  );\r
\r
ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {\r
  {\r
    // Cluster 0, Core 0\r
    0x0, 0x0,\r
\r
    // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,\r
    (UINT64)0xFFFFFFFF\r
  },\r
  {\r
    // Cluster 0, Core 1\r
    0x0, 0x1,\r
\r
    // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,\r
    (UINT64)0xFFFFFFFF\r
  },\r
  {\r
    // Cluster 0, Core 2\r
    0x0, 0x2,\r
\r
    // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,\r
    (UINT64)0xFFFFFFFF\r
  },\r
  {\r
    // Cluster 0, Core 3\r
    0x0, 0x3,\r
\r
    // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,\r
    (UINT64)0xFFFFFFFF\r
  },\r
  {\r
    // Cluster 1, Core 0\r
    0x1, 0x0,\r
\r
    // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,\r
    (UINT64)0xFFFFFFFF\r
  },\r
  {\r
    // Cluster 1, Core 1\r
    0x1, 0x1,\r
\r
    // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,\r
    (UINT64)0xFFFFFFFF\r
  },\r
  {\r
    // Cluster 1, Core 2\r
    0x1, 0x2,\r
\r
    // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,\r
    (UINT64)0xFFFFFFFF\r
  },\r
  {\r
    // Cluster 1, Core 3\r
    0x1, 0x3,\r
\r
    // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,\r
    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,\r
    (UINT64)0xFFFFFFFF\r
  }\r
};\r
\r
/**\r
  Return the current Boot Mode\r
\r
  This function returns the boot reason on the platform\r
\r
  @return   Return the current Boot Mode of the platform\r
\r
**/\r
EFI_BOOT_MODE\r
ArmPlatformGetBootMode (\r
  VOID\r
  )\r
{\r
  return BOOT_WITH_FULL_CONFIGURATION;\r
}\r
\r
/**\r
  Initialize controllers that must setup in the normal world\r
\r
  This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim\r
  in the PEI phase.\r
\r
**/\r
RETURN_STATUS\r
ArmPlatformInitialize (\r
  IN  UINTN                     MpId\r
  )\r
{\r
  if (!ArmPlatformIsPrimaryCore (MpId)) {\r
    return RETURN_SUCCESS;\r
  }\r
\r
  // Disable memory remapping and return to normal mapping\r
  MmioOr32 (SP810_CTRL_BASE, BIT8);\r
\r
  return RETURN_SUCCESS;\r
}\r
\r
EFI_STATUS\r
PrePeiCoreGetMpCoreInfo (\r
  OUT UINTN                   *CoreCount,\r
  OUT ARM_CORE_INFO           **ArmCoreTable\r
  )\r
{\r
  UINT32   ProcType;\r
\r
  ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;\r
  if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) {\r
    // Only support one cluster on all but ARMv8 FVP platform. FVP still uses CortexA9 ID.\r
    *CoreCount    = ArmGetCpuCountPerCluster ();\r
    *ArmCoreTable = mVersatileExpressMpCoreInfoTable;\r
    return EFI_SUCCESS;\r
  } else {\r
    return EFI_UNSUPPORTED;\r
  }\r
}\r
\r
ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };\r
\r
EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {\r
  {\r
    EFI_PEI_PPI_DESCRIPTOR_PPI,\r
    &gArmMpCoreInfoPpiGuid,\r
    &mMpCoreInfoPpi\r
  }\r
};\r
\r
VOID\r
ArmPlatformGetPlatformPpiList (\r
  OUT UINTN                   *PpiListSize,\r
  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList\r
  )\r
{\r
  *PpiListSize = sizeof(gPlatformPpiTable);\r
  *PpiList = gPlatformPpiTable;\r
}\r