]> git.proxmox.com Git - mirror_edk2.git/blame - ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfig.c
ArmPlatformPkg/ArmPlatformSysConfigLib: Removed dependency on Uefi.h since it is...
[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / Library / ArmVExpressSysConfigLib / ArmVExpressSysConfig.c
CommitLineData
af0283b8 1/** @file ArmVExpressSysConfig.c\r
2\r
3 Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
7b80d1a3 4\r
7b80d1a3 5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
af0283b8 15#include <Base.h>\r
7b80d1a3 16#include <Library/IoLib.h>\r
17#include <Library/DebugLib.h>\r
18\r
19#include <Library/ArmPlatformSysConfigLib.h>\r
20#include <ArmPlatform.h>\r
21\r
22//\r
23// SYS_CFGCTRL Bits\r
24//\r
25#define SYS_CFGCTRL_START BIT31\r
26#define SYS_CFGCTRL_READ (0 << 30)\r
27#define SYS_CFGCTRL_WRITE (1 << 30)\r
28#define SYS_CFGCTRL_FUNCTION(fun) (((fun ) & 0x3F) << 20)\r
29#define SYS_CFGCTRL_SITE(site) (((site) & 0x3) << 16)\r
30#define SYS_CFGCTRL_POSITION(pos) (((pos ) & 0xF) << 12)\r
31#define SYS_CFGCTRL_DEVICE(dev) ((dev ) & 0xFFF)\r
32\r
33//\r
34// SYS_CFGSTAT Bits\r
35//\r
36#define SYS_CFGSTAT_ERROR BIT1\r
37#define SYS_CFGSTAT_COMPLETE BIT0\r
38\r
39/****************************************************************************\r
40 *\r
41 * This file makes it easier to access the System Configuration Registers\r
42 * in the ARM Versatile Express motherboard.\r
43 *\r
44 ****************************************************************************/\r
45\r
af0283b8 46RETURN_STATUS\r
7b80d1a3 47ArmPlatformSysConfigInitialize (\r
48 VOID\r
49 )\r
50{\r
af0283b8 51 return RETURN_SUCCESS;\r
7b80d1a3 52}\r
53\r
54/***************************************\r
55 * GENERAL FUNCTION: AccessSysCfgRegister\r
56 * Interacts with\r
57 * SYS_CFGSTAT\r
58 * SYS_CFGDATA\r
59 * SYS_CFGCTRL\r
60 * for setting and for reading out values\r
61 ***************************************/\r
62\r
af0283b8 63RETURN_STATUS\r
7b80d1a3 64AccessSysCfgRegister (\r
65 IN UINT32 ReadWrite,\r
66 IN UINT32 Function,\r
67 IN UINT32 Site,\r
68 IN UINT32 Position,\r
69 IN UINT32 Device,\r
70 IN OUT UINT32* Data\r
71 )\r
72{\r
73 UINT32 SysCfgCtrl;\r
74\r
75 // Clear the COMPLETE bit\r
76 MmioAnd32(ARM_VE_SYS_CFGSTAT_REG, ~SYS_CFGSTAT_COMPLETE);\r
77\r
78 // If writing, then set the data value\r
79 if(ReadWrite == SYS_CFGCTRL_WRITE) {\r
80 MmioWrite32(ARM_VE_SYS_CFGDATA_REG, *Data);\r
81 }\r
82\r
83 // Set the control value\r
84 SysCfgCtrl = SYS_CFGCTRL_START | ReadWrite | SYS_CFGCTRL_FUNCTION(Function) | SYS_CFGCTRL_SITE(Site) |\r
85 SYS_CFGCTRL_POSITION(Position) | SYS_CFGCTRL_DEVICE(Device);\r
86 MmioWrite32(ARM_VE_SYS_CFGCTRL_REG, SysCfgCtrl);\r
87\r
88 // Wait until the COMPLETE bit is set\r
89 while ((MmioRead32(ARM_VE_SYS_CFGSTAT_REG) & SYS_CFGSTAT_COMPLETE) == 0);\r
90\r
91 // Check for errors\r
92 if(MmioRead32(ARM_VE_SYS_CFGSTAT_REG) & SYS_CFGSTAT_ERROR) {\r
af0283b8 93 return RETURN_DEVICE_ERROR;\r
7b80d1a3 94 }\r
95\r
96 // If reading then get the data value\r
97 if(ReadWrite == SYS_CFGCTRL_READ) {\r
98 *Data = MmioRead32(ARM_VE_SYS_CFGDATA_REG);\r
99 }\r
100\r
af0283b8 101 return RETURN_SUCCESS;\r
7b80d1a3 102}\r
103\r
af0283b8 104RETURN_STATUS\r
7b80d1a3 105ArmPlatformSysConfigGet (\r
106 IN SYS_CONFIG_FUNCTION Function,\r
107 OUT UINT32* Value\r
108 )\r
109{\r
110 UINT32 Site;\r
111 UINT32 Position;\r
112 UINT32 Device;\r
113\r
114 Position = 0;\r
115 Device = 0;\r
116\r
117 // Intercept some functions\r
118 switch(Function) {\r
119\r
120 case SYS_CFG_OSC_SITE1:\r
121 Function = SYS_CFG_OSC;\r
122 Site = ARM_VE_DAUGHTERBOARD_1_SITE;\r
123 break;\r
124\r
125 case SYS_CFG_OSC_SITE2:\r
126 Function = SYS_CFG_OSC;\r
127 Site = ARM_VE_DAUGHTERBOARD_2_SITE;\r
128 break;\r
129\r
130 case SYS_CFG_MUXFPGA:\r
131 Site = *Value;\r
132 break;\r
133\r
134 case SYS_CFG_OSC:\r
135 case SYS_CFG_VOLT:\r
136 case SYS_CFG_AMP:\r
137 case SYS_CFG_TEMP:\r
138 case SYS_CFG_RESET:\r
139 case SYS_CFG_SCC:\r
140 case SYS_CFG_DVIMODE:\r
141 case SYS_CFG_POWER:\r
142 Site = ARM_VE_MOTHERBOARD_SITE;\r
143 break;\r
144\r
145 case SYS_CFG_SHUTDOWN:\r
146 case SYS_CFG_REBOOT:\r
147 case SYS_CFG_RTC:\r
148 default:\r
af0283b8 149 return RETURN_UNSUPPORTED;\r
7b80d1a3 150 }\r
151\r
152 return AccessSysCfgRegister (SYS_CFGCTRL_READ, Function, Site, Position, Device, Value);\r
153}\r
154\r
af0283b8 155RETURN_STATUS\r
911da886 156ArmPlatformSysConfigGetValues (\r
157 IN SYS_CONFIG_FUNCTION Function,\r
158 IN UINTN Size,\r
159 OUT UINT32* Values\r
160 )\r
161{\r
af0283b8 162 return RETURN_UNSUPPORTED;\r
911da886 163}\r
164\r
af0283b8 165RETURN_STATUS\r
7b80d1a3 166ArmPlatformSysConfigSet (\r
167 IN SYS_CONFIG_FUNCTION Function,\r
168 IN UINT32 Value\r
169 )\r
170{\r
171 UINT32 Site;\r
172 UINT32 Position;\r
173 UINT32 Device;\r
174\r
175 Position = 0;\r
176 Device = 0;\r
177\r
178 // Intercept some functions\r
179 switch(Function) {\r
180\r
181 case SYS_CFG_OSC_SITE1:\r
182 Function = SYS_CFG_OSC;\r
183 Site = ARM_VE_DAUGHTERBOARD_1_SITE;\r
184 break;\r
185\r
186 case SYS_CFG_OSC_SITE2:\r
187 Function = SYS_CFG_OSC;\r
188 Site = ARM_VE_DAUGHTERBOARD_2_SITE;\r
189 break;\r
190\r
191 case SYS_CFG_MUXFPGA:\r
192 Site = Value;\r
193 break;\r
194\r
195 case SYS_CFG_RESET:\r
196 case SYS_CFG_SCC:\r
197 case SYS_CFG_SHUTDOWN:\r
198 case SYS_CFG_REBOOT:\r
199 case SYS_CFG_DVIMODE:\r
200 case SYS_CFG_POWER:\r
201 Site = ARM_VE_MOTHERBOARD_SITE;\r
202 break;\r
203\r
204 case SYS_CFG_OSC:\r
205 case SYS_CFG_VOLT:\r
206 case SYS_CFG_AMP:\r
207 case SYS_CFG_TEMP:\r
208 case SYS_CFG_RTC:\r
209 default:\r
af0283b8 210 return RETURN_UNSUPPORTED;\r
7b80d1a3 211 }\r
212\r
213 return AccessSysCfgRegister (SYS_CFGCTRL_WRITE, Function, Site, Position, Device, &Value);\r
214}\r
215\r
af0283b8 216RETURN_STATUS\r
7b80d1a3 217ArmPlatformSysConfigSetDevice (\r
218 IN SYS_CONFIG_FUNCTION Function,\r
219 IN UINT32 Device,\r
220 IN UINT32 Value\r
221 )\r
222{\r
223 UINT32 Site;\r
224 UINT32 Position;\r
225\r
226 Position = 0;\r
227\r
228 // Intercept some functions\r
229 switch(Function) {\r
4463f706 230 case SYS_CFG_SCC:\r
a79803d7 231#ifdef ARM_VE_SCC_BASE\r
4463f706 232 MmioWrite32 ((ARM_VE_SCC_BASE + (Device * 4)),Value);\r
af0283b8 233 return RETURN_SUCCESS;\r
a79803d7 234#else\r
235 // There is no System Configuration Controller on the Model\r
af0283b8 236 return RETURN_UNSUPPORTED;\r
a79803d7 237#endif\r
7b80d1a3 238\r
239 case SYS_CFG_OSC_SITE1:\r
240 Function = SYS_CFG_OSC;\r
241 Site = ARM_VE_DAUGHTERBOARD_1_SITE;\r
242 break;\r
243\r
244 case SYS_CFG_OSC_SITE2:\r
245 Function = SYS_CFG_OSC;\r
246 Site = ARM_VE_DAUGHTERBOARD_2_SITE;\r
247 break;\r
248\r
249 case SYS_CFG_MUXFPGA:\r
250 Site = Value;\r
251 break;\r
252\r
253 case SYS_CFG_RTC:\r
af0283b8 254 return RETURN_UNSUPPORTED;\r
7b80d1a3 255 //break;\r
256\r
257 case SYS_CFG_OSC:\r
258 case SYS_CFG_VOLT:\r
259 case SYS_CFG_AMP:\r
260 case SYS_CFG_TEMP:\r
261 case SYS_CFG_RESET:\r
7b80d1a3 262 case SYS_CFG_SHUTDOWN:\r
263 case SYS_CFG_REBOOT:\r
264 case SYS_CFG_DVIMODE:\r
265 case SYS_CFG_POWER:\r
266 Site = ARM_VE_MOTHERBOARD_SITE;\r
267 break;\r
268 default:\r
af0283b8 269 return RETURN_UNSUPPORTED;\r
7b80d1a3 270 }\r
271\r
272 return AccessSysCfgRegister (SYS_CFGCTRL_WRITE, Function, Site, Position, Device, &Value);\r
273}\r