ArmPlatformPkg/LcdGraphicsOutputDxe: check PrimeCell ID before initializing
[mirror_edk2.git] / ArmPlatformPkg / Drivers / LcdGraphicsOutputDxe / PL111Lcd.c
CommitLineData
7d0f2f23 1/** @file PL111Lcd.c\r
2\r
3f305c06 3 Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
4\r
7d0f2f23 5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
7d0f2f23 15#include <Library/IoLib.h>\r
7d0f2f23 16#include <Library/MemoryAllocationLib.h>\r
7d0f2f23 17\r
18#include <Drivers/PL111Lcd.h>\r
19\r
20#include "LcdGraphicsOutputDxe.h"\r
21\r
22/**********************************************************************\r
23 *\r
24 * This file contains all the bits of the PL111 that are\r
25 * platform independent.\r
26 *\r
27 **********************************************************************/\r
28\r
9dc94d98
AB
29EFI_STATUS\r
30LcdIdentify (\r
31 VOID\r
32 )\r
33{\r
34 DEBUG ((EFI_D_WARN, "Probing ID registers at 0x%lx for a PL111\n",\r
35 PL111_REG_CLCD_PERIPH_ID_0));\r
36\r
37 // Check if this is a PL111\r
38 if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 &&\r
39 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 &&\r
40 (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 &&\r
41 MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 &&\r
42 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 &&\r
43 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 &&\r
44 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 &&\r
45 MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) {\r
46 return EFI_SUCCESS;\r
47 }\r
48 return EFI_NOT_FOUND;\r
49}\r
50\r
7d0f2f23 51EFI_STATUS\r
52LcdInitialize (\r
53 IN EFI_PHYSICAL_ADDRESS VramBaseAddress\r
54 )\r
55{\r
7d0f2f23 56 // Define start of the VRAM. This never changes for any graphics mode\r
57 MmioWrite32(PL111_REG_LCD_UP_BASE, (UINT32) VramBaseAddress);\r
58 MmioWrite32(PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer\r
59\r
60 // Disable all interrupts from the PL111\r
61 MmioWrite32(PL111_REG_LCD_IMSC, 0);\r
62\r
63 return EFI_SUCCESS;\r
64}\r
65\r
66EFI_STATUS\r
67LcdSetMode (\r
68 IN UINT32 ModeNumber\r
69 )\r
70{\r
71 EFI_STATUS Status;\r
72 UINT32 HRes;\r
73 UINT32 HSync;\r
74 UINT32 HBackPorch;\r
75 UINT32 HFrontPorch;\r
76 UINT32 VRes;\r
77 UINT32 VSync;\r
78 UINT32 VBackPorch;\r
79 UINT32 VFrontPorch;\r
80 UINT32 LcdControl;\r
81 LCD_BPP LcdBpp;\r
82\r
83 // Set the video mode timings and other relevant information\r
84 Status = LcdPlatformGetTimings (ModeNumber,\r
85 &HRes,&HSync,&HBackPorch,&HFrontPorch,\r
86 &VRes,&VSync,&VBackPorch,&VFrontPorch);\r
87 ASSERT_EFI_ERROR (Status);\r
88 if (EFI_ERROR( Status )) {\r
89 return EFI_DEVICE_ERROR;\r
90 }\r
91\r
92 Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);\r
93 ASSERT_EFI_ERROR (Status);\r
94 if (EFI_ERROR( Status )) {\r
95 return EFI_DEVICE_ERROR;\r
96 }\r
97\r
98 // Disable the CLCD_LcdEn bit\r
99 LcdControl = MmioRead32( PL111_REG_LCD_CONTROL);\r
100 MmioWrite32(PL111_REG_LCD_CONTROL, LcdControl & ~1);\r
101\r
102 // Set Timings\r
103 MmioWrite32 (PL111_REG_LCD_TIMING_0, HOR_AXIS_PANEL(HBackPorch, HFrontPorch, HSync, HRes));\r
104 MmioWrite32 (PL111_REG_LCD_TIMING_1, VER_AXIS_PANEL(VBackPorch, VFrontPorch, VSync, VRes));\r
105 MmioWrite32 (PL111_REG_LCD_TIMING_2, CLK_SIG_POLARITY(HRes));\r
106 MmioWrite32 (PL111_REG_LCD_TIMING_3, 0);\r
107\r
108 // PL111_REG_LCD_CONTROL\r
109 LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP(LcdBpp) | PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;\r
110 MmioWrite32(PL111_REG_LCD_CONTROL, LcdControl);\r
111\r
112 // Turn on power to the LCD Panel\r
113 LcdControl |= PL111_CTRL_LCD_PWR;\r
114 MmioWrite32(PL111_REG_LCD_CONTROL, LcdControl);\r
115\r
116 return EFI_SUCCESS;\r
117}\r
118\r
119VOID\r
120LcdShutdown (\r
121 VOID\r
122 )\r
123{\r
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OM
124 // Disable the controller\r
125 MmioAnd32 (PL111_REG_LCD_CONTROL, ~PL111_CTRL_LCD_EN);\r
7d0f2f23 126}\r