[mirror_edk2.git] / ArmPlatformPkg / Drivers / NorFlashDxe / NorFlashDxe.h

/** @file  NorFlashDxe.h\r
\r
  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef __NOR_FLASH_DXE_H__\r
#define __NOR_FLASH_DXE_H__\r
\r
\r
#include <Base.h>\r
#include <PiDxe.h>\r
\r
#include <Protocol/BlockIo.h>\r
#include <Protocol/FirmwareVolumeBlock.h>\r
\r
#include <Library/DebugLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/NorFlashPlatformLib.h>\r
#include <Library/UefiLib.h>\r
\r
#define NOR_FLASH_ERASE_RETRY                     10\r
\r
// Device access macros\r
// These are necessary because we use 2 x 16bit parts to make up 32bit data\r
\r
#define HIGH_16_BITS                              0xFFFF0000\r
#define LOW_16_BITS                               0x0000FFFF\r
#define LOW_8_BITS                                0x000000FF\r
\r
#define FOLD_32BIT_INTO_16BIT(value)              ( ( value >> 16 ) | ( value & LOW_16_BITS ) )\r
\r
#define GET_LOW_BYTE(value)                       ( value & LOW_8_BITS )\r
#define GET_HIGH_BYTE(value)                      ( GET_LOW_BYTE( value >> 16 ) )\r
\r
// Each command must be sent simultaneously to both chips,\r
// i.e. at the lower 16 bits AND at the higher 16 bits\r
#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr)   ((BaseAddr) + ((OffsetAddr) << 2))\r
#define CREATE_DUAL_CMD(Cmd)                      ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )\r
#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r
#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )\r
\r
// Status Register Bits\r
#define P30_SR_BIT_WRITE                          (BIT7 << 16 | BIT7)\r
#define P30_SR_BIT_ERASE_SUSPEND                  (BIT6 << 16 | BIT6)\r
#define P30_SR_BIT_ERASE                          (BIT5 << 16 | BIT5)\r
#define P30_SR_BIT_PROGRAM                        (BIT4 << 16 | BIT4)\r
#define P30_SR_BIT_VPP                            (BIT3 << 16 | BIT3)\r
#define P30_SR_BIT_PROGRAM_SUSPEND                (BIT2 << 16 | BIT2)\r
#define P30_SR_BIT_BLOCK_LOCKED                   (BIT1 << 16 | BIT1)\r
#define P30_SR_BIT_BEFP                           (BIT0 << 16 | BIT0)\r
\r
// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family\r
\r
// On chip buffer size for buffered programming operations\r
// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.\r
// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes\r
#define P30_MAX_BUFFER_SIZE_IN_BYTES              ((UINTN)128)\r
#define P30_MAX_BUFFER_SIZE_IN_WORDS              (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r
#define MAX_BUFFERED_PROG_ITERATIONS              10000000\r
#define BOUNDARY_OF_32_WORDS                      0x7F\r
\r
// CFI Addresses\r
#define P30_CFI_ADDR_QUERY_UNIQUE_QRY             0x10\r
#define P30_CFI_ADDR_VENDOR_ID                    0x13\r
\r
// CFI Data\r
#define CFI_QRY                                   0x00595251\r
\r
// READ Commands\r
#define P30_CMD_READ_DEVICE_ID                    0x0090\r
#define P30_CMD_READ_STATUS_REGISTER              0x0070\r
#define P30_CMD_CLEAR_STATUS_REGISTER             0x0050\r
#define P30_CMD_READ_ARRAY                        0x00FF\r
#define P30_CMD_READ_CFI_QUERY                    0x0098\r
\r
// WRITE Commands\r
#define P30_CMD_WORD_PROGRAM_SETUP                0x0040\r
#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP      0x0010\r
#define P30_CMD_BUFFERED_PROGRAM_SETUP            0x00E8\r
#define P30_CMD_BUFFERED_PROGRAM_CONFIRM          0x00D0\r
#define P30_CMD_BEFP_SETUP                        0x0080\r
#define P30_CMD_BEFP_CONFIRM                      0x00D0\r
\r
// ERASE Commands\r
#define P30_CMD_BLOCK_ERASE_SETUP                 0x0020\r
#define P30_CMD_BLOCK_ERASE_CONFIRM               0x00D0\r
\r
// SUSPEND Commands\r
#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND          0x00B0\r
#define P30_CMD_SUSPEND_RESUME                    0x00D0\r
\r
// BLOCK LOCKING / UNLOCKING Commands\r
#define P30_CMD_LOCK_BLOCK_SETUP                  0x0060\r
#define P30_CMD_LOCK_BLOCK                        0x0001\r
#define P30_CMD_UNLOCK_BLOCK                      0x00D0\r
#define P30_CMD_LOCK_DOWN_BLOCK                   0x002F\r
\r
// PROTECTION Commands\r
#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r
\r
// CONFIGURATION Commands\r
#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r
#define P30_CMD_READ_CONFIGURATION_REGISTER       0x0003\r
\r
#define NOR_FLASH_SIGNATURE                       SIGNATURE_32('n', 'o', 'r', '0')\r
#define INSTANCE_FROM_FVB_THIS(a)                 CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r
#define INSTANCE_FROM_BLKIO_THIS(a)               CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r
\r
typedef struct _NOR_FLASH_INSTANCE                NOR_FLASH_INSTANCE;\r
\r
typedef EFI_STATUS (*NOR_FLASH_INITIALIZE)        (NOR_FLASH_INSTANCE* Instance);\r
\r
typedef struct {\r
  VENDOR_DEVICE_PATH                  Vendor;\r
  EFI_DEVICE_PATH_PROTOCOL            End;\r
} NOR_FLASH_DEVICE_PATH;\r
\r
struct _NOR_FLASH_INSTANCE {\r
  UINT32                              Signature;\r
  EFI_HANDLE                          Handle;\r
\r
  BOOLEAN                             Initialized;\r
  NOR_FLASH_INITIALIZE                Initialize;\r
\r
  UINTN                               DeviceBaseAddress;\r
  UINTN                               RegionBaseAddress;\r
  UINTN                               Size;\r
  EFI_LBA                             StartLba;\r
\r
  EFI_BLOCK_IO_PROTOCOL               BlockIoProtocol;\r
  EFI_BLOCK_IO_MEDIA                  Media;\r
\r
  BOOLEAN                             SupportFvb;\r
  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r
\r
  NOR_FLASH_DEVICE_PATH	              DevicePath;\r
};\r
\r
EFI_STATUS\r
NorFlashReadCfiData (\r
  IN  UINTN                   DeviceBaseAddress,\r
  IN  UINTN                   CFI_Offset,\r
  IN  UINT32                  NumberOfBytes,\r
  OUT UINT32                  *Data\r
  );\r
\r
EFI_STATUS\r
NorFlashWriteBuffer (\r
  IN NOR_FLASH_INSTANCE     *Instance,\r
  IN UINTN                  TargetAddress,\r
  IN UINTN                  BufferSizeInBytes,\r
  IN UINT32                 *Buffer\r
  );\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoReset (\r
  IN EFI_BLOCK_IO_PROTOCOL    *This,\r
  IN BOOLEAN                  ExtendedVerification\r
  );\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoReadBlocks (\r
  IN  EFI_BLOCK_IO_PROTOCOL   *This,\r
  IN  UINT32                  MediaId,\r
  IN  EFI_LBA                 Lba,\r
  IN  UINTN                   BufferSizeInBytes,\r
  OUT VOID                    *Buffer\r
);\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoWriteBlocks (\r
  IN  EFI_BLOCK_IO_PROTOCOL   *This,\r
  IN  UINT32                  MediaId,\r
  IN  EFI_LBA                 Lba,\r
  IN  UINTN                   BufferSizeInBytes,\r
  IN  VOID                    *Buffer\r
);\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoFlushBlocks (\r
  IN EFI_BLOCK_IO_PROTOCOL    *This\r
);\r
\r
\r
//\r
// NorFlashFvbDxe.c\r
//\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashFvbInitialize (\r
  IN NOR_FLASH_INSTANCE*                            Instance\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbGetAttributes(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  OUT       EFI_FVB_ATTRIBUTES_2                    *Attributes\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbSetAttributes(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN OUT    EFI_FVB_ATTRIBUTES_2                    *Attributes\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbGetPhysicalAddress(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  OUT       EFI_PHYSICAL_ADDRESS                    *Address\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbGetBlockSize(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN        EFI_LBA                                 Lba,\r
  OUT       UINTN                                   *BlockSize,\r
  OUT       UINTN                                   *NumberOfBlocks\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbRead(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN        EFI_LBA                                 Lba,\r
  IN        UINTN                                   Offset,\r
  IN OUT    UINTN                                   *NumBytes,\r
  IN OUT    UINT8                                   *Buffer\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbWrite(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN        EFI_LBA                                 Lba,\r
  IN        UINTN                                   Offset,\r
  IN OUT    UINTN                                   *NumBytes,\r
  IN        UINT8                                   *Buffer\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbEraseBlocks(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  ...\r
  );\r
\r
//\r
// NorFlashDxe.c\r
//\r
\r
EFI_STATUS\r
NorFlashUnlockAndEraseSingleBlock (\r
  IN NOR_FLASH_INSTANCE     *Instance,\r
  IN UINTN                  BlockAddress\r
  );\r
\r
EFI_STATUS\r
NorFlashWriteSingleBlock (\r
  IN NOR_FLASH_INSTANCE     *Instance,\r
  IN EFI_LBA                Lba,\r
  IN UINT32                 *DataBuffer,\r
  IN UINT32                 BlockSizeInWords\r
  );\r
\r
EFI_STATUS\r
NorFlashWriteBlocks (\r
  IN  NOR_FLASH_INSTANCE *Instance,\r
  IN  EFI_LBA           Lba,\r
  IN  UINTN             BufferSizeInBytes,\r
  IN  VOID              *Buffer\r
  );\r
\r
EFI_STATUS\r
NorFlashReadBlocks (\r
  IN NOR_FLASH_INSTANCE   *Instance,\r
  IN EFI_LBA              Lba,\r
  IN UINTN                BufferSizeInBytes,\r
  OUT VOID                *Buffer\r
  );\r
\r
EFI_STATUS\r
NorFlashReset (\r
  IN  NOR_FLASH_INSTANCE *Instance\r
  );\r
\r
#endif /* __NOR_FLASH_DXE_H__ */\r
Commit	Line	Data
1e57a462	1	/** @file NorFlashDxe.h\r
	2	\r
	3	Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
	4	\r
	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#ifndef __NOR_FLASH_DXE_H__\r
	16	#define __NOR_FLASH_DXE_H__\r
	17	\r
	18	\r
	19	#include <Base.h>\r
	20	#include <PiDxe.h>\r
	21	\r
	22	#include <Protocol/BlockIo.h>\r
	23	#include <Protocol/FirmwareVolumeBlock.h>\r
	24	\r
	25	#include <Library/DebugLib.h>\r
	26	#include <Library/IoLib.h>\r
	27	#include <Library/NorFlashPlatformLib.h>\r
	28	#include <Library/UefiLib.h>\r
	29	\r
	30	#define NOR_FLASH_ERASE_RETRY 10\r
	31	\r
	32	// Device access macros\r
	33	// These are necessary because we use 2 x 16bit parts to make up 32bit data\r
	34	\r
	35	#define HIGH_16_BITS 0xFFFF0000\r
	36	#define LOW_16_BITS 0x0000FFFF\r
	37	#define LOW_8_BITS 0x000000FF\r
	38	\r
	39	#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) \| ( value & LOW_16_BITS ) )\r
	40	\r
	41	#define GET_LOW_BYTE(value) ( value & LOW_8_BITS )\r
	42	#define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )\r
	43	\r
	44	// Each command must be sent simultaneously to both chips,\r
	45	// i.e. at the lower 16 bits AND at the higher 16 bits\r
	46	#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))\r
	47	#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) \| ( Cmd & LOW_16_BITS) )\r
	48	#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r
	49	#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )\r
	50	\r
	51	// Status Register Bits\r
	52	#define P30_SR_BIT_WRITE (BIT7 << 16 \| BIT7)\r
	53	#define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 \| BIT6)\r
	54	#define P30_SR_BIT_ERASE (BIT5 << 16 \| BIT5)\r
	55	#define P30_SR_BIT_PROGRAM (BIT4 << 16 \| BIT4)\r
	56	#define P30_SR_BIT_VPP (BIT3 << 16 \| BIT3)\r
	57	#define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 \| BIT2)\r
	58	#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 \| BIT1)\r
	59	#define P30_SR_BIT_BEFP (BIT0 << 16 \| BIT0)\r
	60	\r
	61	// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family\r
	62	\r
	63	// On chip buffer size for buffered programming operations\r
	64	// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.\r
65	// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes\r
66	#define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)\r
67	#define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r
68	#define MAX_BUFFERED_PROG_ITERATIONS 10000000\r
69	#define BOUNDARY_OF_32_WORDS 0x7F\r
70	\r
71	// CFI Addresses\r
72	#define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10\r
73	#define P30_CFI_ADDR_VENDOR_ID 0x13\r
74	\r
75	// CFI Data\r
76	#define CFI_QRY 0x00595251\r
77	\r
78	// READ Commands\r
79	#define P30_CMD_READ_DEVICE_ID 0x0090\r
80	#define P30_CMD_READ_STATUS_REGISTER 0x0070\r
81	#define P30_CMD_CLEAR_STATUS_REGISTER 0x0050\r
82	#define P30_CMD_READ_ARRAY 0x00FF\r
83	#define P30_CMD_READ_CFI_QUERY 0x0098\r
84	\r
85	// WRITE Commands\r
86	#define P30_CMD_WORD_PROGRAM_SETUP 0x0040\r
87	#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010\r
88	#define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8\r
89	#define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0\r
90	#define P30_CMD_BEFP_SETUP 0x0080\r
91	#define P30_CMD_BEFP_CONFIRM 0x00D0\r
92	\r
93	// ERASE Commands\r
94	#define P30_CMD_BLOCK_ERASE_SETUP 0x0020\r
95	#define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0\r
96	\r
97	// SUSPEND Commands\r
98	#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0\r
99	#define P30_CMD_SUSPEND_RESUME 0x00D0\r
100	\r
101	// BLOCK LOCKING / UNLOCKING Commands\r
102	#define P30_CMD_LOCK_BLOCK_SETUP 0x0060\r
103	#define P30_CMD_LOCK_BLOCK 0x0001\r
104	#define P30_CMD_UNLOCK_BLOCK 0x00D0\r
105	#define P30_CMD_LOCK_DOWN_BLOCK 0x002F\r
106	\r
107	// PROTECTION Commands\r
108	#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r
109	\r
110	// CONFIGURATION Commands\r
111	#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r
112	#define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003\r
113	\r
114	#define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')\r
115	#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r
116	#define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r
117	\r
118	typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;\r
119	\r
120	typedef EFI_STATUS (NOR_FLASH_INITIALIZE) (NOR_FLASH_INSTANCE Instance);\r
121	\r
122	typedef struct {\r
123	VENDOR_DEVICE_PATH Vendor;\r
124	EFI_DEVICE_PATH_PROTOCOL End;\r
125	} NOR_FLASH_DEVICE_PATH;\r
126	\r
127	struct _NOR_FLASH_INSTANCE {\r
128	UINT32 Signature;\r
129	EFI_HANDLE Handle;\r
130	\r
131	BOOLEAN Initialized;\r
132	NOR_FLASH_INITIALIZE Initialize;\r
133	\r
134	UINTN DeviceBaseAddress;\r
135	UINTN RegionBaseAddress;\r
136	UINTN Size;\r
137	EFI_LBA StartLba;\r
138	\r
139	EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;\r
140	EFI_BLOCK_IO_MEDIA Media;\r
141	\r
142	BOOLEAN SupportFvb;\r
143	EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r
144	\r
145	NOR_FLASH_DEVICE_PATH DevicePath;\r
146	};\r
147	\r
148	EFI_STATUS\r
149	NorFlashReadCfiData (\r
150	IN UINTN DeviceBaseAddress,\r
151	IN UINTN CFI_Offset,\r
152	IN UINT32 NumberOfBytes,\r
153	OUT UINT32 *Data\r
154	);\r
155	\r
156	EFI_STATUS\r
157	NorFlashWriteBuffer (\r
158	IN NOR_FLASH_INSTANCE *Instance,\r
159	IN UINTN TargetAddress,\r
160	IN UINTN BufferSizeInBytes,\r
161	IN UINT32 *Buffer\r
162	);\r
163	\r
164	//\r
165	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset\r
166	//\r
167	EFI_STATUS\r
168	EFIAPI\r
169	NorFlashBlockIoReset (\r
170	IN EFI_BLOCK_IO_PROTOCOL *This,\r
171	IN BOOLEAN ExtendedVerification\r
172	);\r
173	\r
174	//\r
175	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks\r
176	//\r
177	EFI_STATUS\r
178	EFIAPI\r
179	NorFlashBlockIoReadBlocks (\r
180	IN EFI_BLOCK_IO_PROTOCOL *This,\r
181	IN UINT32 MediaId,\r
182	IN EFI_LBA Lba,\r
183	IN UINTN BufferSizeInBytes,\r
184	OUT VOID *Buffer\r
185	);\r
186	\r
187	//\r
188	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks\r
189	//\r
190	EFI_STATUS\r
191	EFIAPI\r
192	NorFlashBlockIoWriteBlocks (\r
193	IN EFI_BLOCK_IO_PROTOCOL *This,\r
194	IN UINT32 MediaId,\r
195	IN EFI_LBA Lba,\r
196	IN UINTN BufferSizeInBytes,\r
197	IN VOID *Buffer\r
198	);\r
199	\r
200	//\r
201	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks\r
202	//\r
203	EFI_STATUS\r
204	EFIAPI\r
205	NorFlashBlockIoFlushBlocks (\r
206	IN EFI_BLOCK_IO_PROTOCOL *This\r
207	);\r
208	\r
209	\r
210	//\r
211	// NorFlashFvbDxe.c\r
212	//\r
213	\r
214	EFI_STATUS\r
215	EFIAPI\r
216	NorFlashFvbInitialize (\r
217	IN NOR_FLASH_INSTANCE* Instance\r
218	);\r
219	\r
220	EFI_STATUS\r
221	EFIAPI\r
222	FvbGetAttributes(\r
223	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
224	OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
225	);\r
226	\r
227	EFI_STATUS\r
228	EFIAPI\r
229	FvbSetAttributes(\r
230	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
231	IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
232	);\r
233	\r
234	EFI_STATUS\r
235	EFIAPI\r
236	FvbGetPhysicalAddress(\r
237	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
238	OUT EFI_PHYSICAL_ADDRESS *Address\r
239	);\r
240	\r
241	EFI_STATUS\r
242	EFIAPI\r
243	FvbGetBlockSize(\r
244	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
245	IN EFI_LBA Lba,\r
246	OUT UINTN *BlockSize,\r
247	OUT UINTN *NumberOfBlocks\r
248	);\r
249	\r
250	EFI_STATUS\r
251	EFIAPI\r
252	FvbRead(\r
253	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
254	IN EFI_LBA Lba,\r
255	IN UINTN Offset,\r
256	IN OUT UINTN *NumBytes,\r
257	IN OUT UINT8 *Buffer\r
258	);\r
259	\r
260	EFI_STATUS\r
261	EFIAPI\r
262	FvbWrite(\r
263	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
264	IN EFI_LBA Lba,\r
265	IN UINTN Offset,\r
266	IN OUT UINTN *NumBytes,\r
267	IN UINT8 *Buffer\r
268	);\r
269	\r
270	EFI_STATUS\r
271	EFIAPI\r
272	FvbEraseBlocks(\r
273	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
274	...\r
275	);\r
276	\r
277	//\r
278	// NorFlashDxe.c\r
279	//\r
280	\r
281	EFI_STATUS\r
282	NorFlashUnlockAndEraseSingleBlock (\r
283	IN NOR_FLASH_INSTANCE *Instance,\r
284	IN UINTN BlockAddress\r
285	);\r
286	\r
287	EFI_STATUS\r
288	NorFlashWriteSingleBlock (\r
289	IN NOR_FLASH_INSTANCE *Instance,\r
290	IN EFI_LBA Lba,\r
291	IN UINT32 *DataBuffer,\r
292	IN UINT32 BlockSizeInWords\r
293	);\r
294	\r
295	EFI_STATUS\r
296	NorFlashWriteBlocks (\r
297	IN NOR_FLASH_INSTANCE *Instance,\r
298	IN EFI_LBA Lba,\r
299	IN UINTN BufferSizeInBytes,\r
300	IN VOID *Buffer\r
301	);\r
302	\r
303	EFI_STATUS\r
304	NorFlashReadBlocks (\r
305	IN NOR_FLASH_INSTANCE *Instance,\r
306	IN EFI_LBA Lba,\r
307	IN UINTN BufferSizeInBytes,\r
308	OUT VOID *Buffer\r
309	);\r
310	\r
311	EFI_STATUS\r
312	NorFlashReset (\r
313	IN NOR_FLASH_INSTANCE *Instance\r
314	);\r
315	\r
316	#endif /* __NOR_FLASH_DXE_H__ */\r