ArmPlatformPkg/NorFlashDxe: initialize varstore headers eagerly
[mirror_edk2.git] / ArmPlatformPkg / Drivers / NorFlashDxe / NorFlashDxe.h
CommitLineData
1e57a462 1/** @file NorFlashDxe.h\r
2\r
2dff0c1a 3 Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
1e57a462 4\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15#ifndef __NOR_FLASH_DXE_H__\r
16#define __NOR_FLASH_DXE_H__\r
17\r
18\r
19#include <Base.h>\r
20#include <PiDxe.h>\r
21\r
1dbbfc17
OM
22#include <Guid/EventGroup.h>\r
23\r
1e57a462 24#include <Protocol/BlockIo.h>\r
452a9ee1 25#include <Protocol/DiskIo.h>\r
1e57a462 26#include <Protocol/FirmwareVolumeBlock.h>\r
27\r
28#include <Library/DebugLib.h>\r
29#include <Library/IoLib.h>\r
30#include <Library/NorFlashPlatformLib.h>\r
31#include <Library/UefiLib.h>\r
2dff0c1a 32#include <Library/UefiRuntimeLib.h>\r
1e57a462 33\r
34#define NOR_FLASH_ERASE_RETRY 10\r
35\r
36// Device access macros\r
37// These are necessary because we use 2 x 16bit parts to make up 32bit data\r
38\r
39#define HIGH_16_BITS 0xFFFF0000\r
40#define LOW_16_BITS 0x0000FFFF\r
41#define LOW_8_BITS 0x000000FF\r
42\r
43#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )\r
44\r
45#define GET_LOW_BYTE(value) ( value & LOW_8_BITS )\r
46#define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )\r
47\r
48// Each command must be sent simultaneously to both chips,\r
49// i.e. at the lower 16 bits AND at the higher 16 bits\r
50#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))\r
51#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )\r
52#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r
53#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )\r
54\r
55// Status Register Bits\r
56#define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)\r
57#define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)\r
58#define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)\r
59#define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)\r
60#define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)\r
61#define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)\r
62#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)\r
63#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)\r
64\r
65// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family\r
66\r
67// On chip buffer size for buffered programming operations\r
68// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.\r
69// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes\r
70#define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)\r
71#define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r
72#define MAX_BUFFERED_PROG_ITERATIONS 10000000\r
73#define BOUNDARY_OF_32_WORDS 0x7F\r
74\r
75// CFI Addresses\r
76#define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10\r
77#define P30_CFI_ADDR_VENDOR_ID 0x13\r
78\r
79// CFI Data\r
80#define CFI_QRY 0x00595251\r
81\r
82// READ Commands\r
83#define P30_CMD_READ_DEVICE_ID 0x0090\r
84#define P30_CMD_READ_STATUS_REGISTER 0x0070\r
85#define P30_CMD_CLEAR_STATUS_REGISTER 0x0050\r
86#define P30_CMD_READ_ARRAY 0x00FF\r
87#define P30_CMD_READ_CFI_QUERY 0x0098\r
88\r
89// WRITE Commands\r
90#define P30_CMD_WORD_PROGRAM_SETUP 0x0040\r
91#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010\r
92#define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8\r
93#define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0\r
94#define P30_CMD_BEFP_SETUP 0x0080\r
95#define P30_CMD_BEFP_CONFIRM 0x00D0\r
96\r
97// ERASE Commands\r
98#define P30_CMD_BLOCK_ERASE_SETUP 0x0020\r
99#define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0\r
100\r
101// SUSPEND Commands\r
102#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0\r
103#define P30_CMD_SUSPEND_RESUME 0x00D0\r
104\r
105// BLOCK LOCKING / UNLOCKING Commands\r
106#define P30_CMD_LOCK_BLOCK_SETUP 0x0060\r
107#define P30_CMD_LOCK_BLOCK 0x0001\r
108#define P30_CMD_UNLOCK_BLOCK 0x00D0\r
109#define P30_CMD_LOCK_DOWN_BLOCK 0x002F\r
110\r
111// PROTECTION Commands\r
112#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r
113\r
114// CONFIGURATION Commands\r
115#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r
116#define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003\r
117\r
118#define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')\r
119#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r
120#define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r
452a9ee1 121#define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)\r
1e57a462 122\r
123typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;\r
124\r
1e57a462 125typedef struct {\r
126 VENDOR_DEVICE_PATH Vendor;\r
127 EFI_DEVICE_PATH_PROTOCOL End;\r
128} NOR_FLASH_DEVICE_PATH;\r
129\r
130struct _NOR_FLASH_INSTANCE {\r
131 UINT32 Signature;\r
132 EFI_HANDLE Handle;\r
133\r
1e57a462 134 UINTN DeviceBaseAddress;\r
135 UINTN RegionBaseAddress;\r
136 UINTN Size;\r
137 EFI_LBA StartLba;\r
138\r
139 EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;\r
140 EFI_BLOCK_IO_MEDIA Media;\r
452a9ee1 141 EFI_DISK_IO_PROTOCOL DiskIoProtocol;\r
1e57a462 142\r
1e57a462 143 EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r
452a9ee1 144 VOID* ShadowBuffer;\r
1e57a462 145\r
91c38d4e 146 NOR_FLASH_DEVICE_PATH DevicePath;\r
1e57a462 147};\r
148\r
149EFI_STATUS\r
150NorFlashReadCfiData (\r
151 IN UINTN DeviceBaseAddress,\r
152 IN UINTN CFI_Offset,\r
153 IN UINT32 NumberOfBytes,\r
154 OUT UINT32 *Data\r
155 );\r
156\r
157EFI_STATUS\r
158NorFlashWriteBuffer (\r
159 IN NOR_FLASH_INSTANCE *Instance,\r
160 IN UINTN TargetAddress,\r
161 IN UINTN BufferSizeInBytes,\r
162 IN UINT32 *Buffer\r
163 );\r
164\r
165//\r
166// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset\r
167//\r
168EFI_STATUS\r
169EFIAPI\r
170NorFlashBlockIoReset (\r
171 IN EFI_BLOCK_IO_PROTOCOL *This,\r
172 IN BOOLEAN ExtendedVerification\r
173 );\r
174\r
175//\r
176// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks\r
177//\r
178EFI_STATUS\r
179EFIAPI\r
180NorFlashBlockIoReadBlocks (\r
181 IN EFI_BLOCK_IO_PROTOCOL *This,\r
182 IN UINT32 MediaId,\r
183 IN EFI_LBA Lba,\r
184 IN UINTN BufferSizeInBytes,\r
185 OUT VOID *Buffer\r
186);\r
187\r
188//\r
189// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks\r
190//\r
191EFI_STATUS\r
192EFIAPI\r
193NorFlashBlockIoWriteBlocks (\r
194 IN EFI_BLOCK_IO_PROTOCOL *This,\r
195 IN UINT32 MediaId,\r
196 IN EFI_LBA Lba,\r
197 IN UINTN BufferSizeInBytes,\r
198 IN VOID *Buffer\r
199);\r
200\r
201//\r
202// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks\r
203//\r
204EFI_STATUS\r
205EFIAPI\r
206NorFlashBlockIoFlushBlocks (\r
207 IN EFI_BLOCK_IO_PROTOCOL *This\r
208);\r
209\r
452a9ee1
BJ
210//\r
211// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk\r
212//\r
213EFI_STATUS\r
214EFIAPI\r
215NorFlashDiskIoReadDisk (\r
216 IN EFI_DISK_IO_PROTOCOL *This,\r
217 IN UINT32 MediaId,\r
218 IN UINT64 Offset,\r
219 IN UINTN BufferSize,\r
220 OUT VOID *Buffer\r
221 );\r
222\r
223//\r
224// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk\r
225//\r
226EFI_STATUS\r
227EFIAPI\r
228NorFlashDiskIoWriteDisk (\r
229 IN EFI_DISK_IO_PROTOCOL *This,\r
230 IN UINT32 MediaId,\r
231 IN UINT64 Offset,\r
232 IN UINTN BufferSize,\r
233 IN VOID *Buffer\r
234 );\r
1e57a462 235\r
236//\r
237// NorFlashFvbDxe.c\r
238//\r
239\r
240EFI_STATUS\r
241EFIAPI\r
242NorFlashFvbInitialize (\r
243 IN NOR_FLASH_INSTANCE* Instance\r
244 );\r
245\r
246EFI_STATUS\r
247EFIAPI\r
248FvbGetAttributes(\r
249 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
250 OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
251 );\r
252\r
253EFI_STATUS\r
254EFIAPI\r
255FvbSetAttributes(\r
256 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
257 IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
258 );\r
259\r
260EFI_STATUS\r
261EFIAPI\r
262FvbGetPhysicalAddress(\r
263 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
264 OUT EFI_PHYSICAL_ADDRESS *Address\r
265 );\r
266\r
267EFI_STATUS\r
268EFIAPI\r
269FvbGetBlockSize(\r
270 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
271 IN EFI_LBA Lba,\r
272 OUT UINTN *BlockSize,\r
273 OUT UINTN *NumberOfBlocks\r
274 );\r
275\r
276EFI_STATUS\r
277EFIAPI\r
278FvbRead(\r
279 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
280 IN EFI_LBA Lba,\r
281 IN UINTN Offset,\r
282 IN OUT UINTN *NumBytes,\r
283 IN OUT UINT8 *Buffer\r
284 );\r
285\r
286EFI_STATUS\r
287EFIAPI\r
288FvbWrite(\r
289 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
290 IN EFI_LBA Lba,\r
291 IN UINTN Offset,\r
292 IN OUT UINTN *NumBytes,\r
293 IN UINT8 *Buffer\r
294 );\r
295\r
296EFI_STATUS\r
297EFIAPI\r
298FvbEraseBlocks(\r
299 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
300 ...\r
301 );\r
302\r
303//\r
304// NorFlashDxe.c\r
305//\r
306\r
307EFI_STATUS\r
308NorFlashUnlockAndEraseSingleBlock (\r
309 IN NOR_FLASH_INSTANCE *Instance,\r
310 IN UINTN BlockAddress\r
311 );\r
312\r
313EFI_STATUS\r
314NorFlashWriteSingleBlock (\r
452a9ee1
BJ
315 IN NOR_FLASH_INSTANCE *Instance,\r
316 IN EFI_LBA Lba,\r
317 IN UINTN Offset,\r
318 IN OUT UINTN *NumBytes,\r
319 IN UINT8 *Buffer\r
1e57a462 320 );\r
321\r
322EFI_STATUS\r
323NorFlashWriteBlocks (\r
324 IN NOR_FLASH_INSTANCE *Instance,\r
325 IN EFI_LBA Lba,\r
326 IN UINTN BufferSizeInBytes,\r
327 IN VOID *Buffer\r
328 );\r
329\r
330EFI_STATUS\r
331NorFlashReadBlocks (\r
332 IN NOR_FLASH_INSTANCE *Instance,\r
333 IN EFI_LBA Lba,\r
334 IN UINTN BufferSizeInBytes,\r
335 OUT VOID *Buffer\r
336 );\r
337\r
518c243d
HL
338EFI_STATUS\r
339NorFlashRead (\r
340 IN NOR_FLASH_INSTANCE *Instance,\r
341 IN EFI_LBA Lba,\r
342 IN UINTN Offset,\r
343 IN UINTN BufferSizeInBytes,\r
344 OUT VOID *Buffer\r
345 );\r
346\r
452a9ee1
BJ
347EFI_STATUS\r
348NorFlashWrite (\r
349 IN NOR_FLASH_INSTANCE *Instance,\r
350 IN EFI_LBA Lba,\r
351 IN UINTN Offset,\r
352 IN OUT UINTN *NumBytes,\r
353 IN UINT8 *Buffer\r
354 );\r
355\r
1e57a462 356EFI_STATUS\r
357NorFlashReset (\r
358 IN NOR_FLASH_INSTANCE *Instance\r
359 );\r
360\r
361#endif /* __NOR_FLASH_DXE_H__ */\r