[mirror_edk2.git] / ArmPlatformPkg / Drivers / NorFlashDxe / NorFlashDxe.h

/** @file  NorFlashDxe.h\r
\r
  Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef __NOR_FLASH_DXE_H__\r
#define __NOR_FLASH_DXE_H__\r
\r
\r
#include <Base.h>\r
#include <PiDxe.h>\r
\r
#include <Guid/EventGroup.h>\r
\r
#include <Protocol/BlockIo.h>\r
#include <Protocol/DiskIo.h>\r
#include <Protocol/FirmwareVolumeBlock.h>\r
\r
#include <Library/DebugLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/NorFlashPlatformLib.h>\r
#include <Library/UefiLib.h>\r
#include <Library/UefiRuntimeLib.h>\r
\r
#define NOR_FLASH_ERASE_RETRY                     10\r
\r
// Device access macros\r
// These are necessary because we use 2 x 16bit parts to make up 32bit data\r
\r
#define HIGH_16_BITS                              0xFFFF0000\r
#define LOW_16_BITS                               0x0000FFFF\r
#define LOW_8_BITS                                0x000000FF\r
\r
#define FOLD_32BIT_INTO_16BIT(value)              ( ( value >> 16 ) | ( value & LOW_16_BITS ) )\r
\r
#define GET_LOW_BYTE(value)                       ( value & LOW_8_BITS )\r
#define GET_HIGH_BYTE(value)                      ( GET_LOW_BYTE( value >> 16 ) )\r
\r
// Each command must be sent simultaneously to both chips,\r
// i.e. at the lower 16 bits AND at the higher 16 bits\r
#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr)   ((BaseAddr) + ((OffsetAddr) << 2))\r
#define CREATE_DUAL_CMD(Cmd)                      ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )\r
#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r
#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )\r
\r
// Status Register Bits\r
#define P30_SR_BIT_WRITE                          (BIT7 << 16 | BIT7)\r
#define P30_SR_BIT_ERASE_SUSPEND                  (BIT6 << 16 | BIT6)\r
#define P30_SR_BIT_ERASE                          (BIT5 << 16 | BIT5)\r
#define P30_SR_BIT_PROGRAM                        (BIT4 << 16 | BIT4)\r
#define P30_SR_BIT_VPP                            (BIT3 << 16 | BIT3)\r
#define P30_SR_BIT_PROGRAM_SUSPEND                (BIT2 << 16 | BIT2)\r
#define P30_SR_BIT_BLOCK_LOCKED                   (BIT1 << 16 | BIT1)\r
#define P30_SR_BIT_BEFP                           (BIT0 << 16 | BIT0)\r
\r
// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family\r
\r
// On chip buffer size for buffered programming operations\r
// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.\r
// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes\r
#define P30_MAX_BUFFER_SIZE_IN_BYTES              ((UINTN)128)\r
#define P30_MAX_BUFFER_SIZE_IN_WORDS              (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r
#define MAX_BUFFERED_PROG_ITERATIONS              10000000\r
#define BOUNDARY_OF_32_WORDS                      0x7F\r
\r
// CFI Addresses\r
#define P30_CFI_ADDR_QUERY_UNIQUE_QRY             0x10\r
#define P30_CFI_ADDR_VENDOR_ID                    0x13\r
\r
// CFI Data\r
#define CFI_QRY                                   0x00595251\r
\r
// READ Commands\r
#define P30_CMD_READ_DEVICE_ID                    0x0090\r
#define P30_CMD_READ_STATUS_REGISTER              0x0070\r
#define P30_CMD_CLEAR_STATUS_REGISTER             0x0050\r
#define P30_CMD_READ_ARRAY                        0x00FF\r
#define P30_CMD_READ_CFI_QUERY                    0x0098\r
\r
// WRITE Commands\r
#define P30_CMD_WORD_PROGRAM_SETUP                0x0040\r
#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP      0x0010\r
#define P30_CMD_BUFFERED_PROGRAM_SETUP            0x00E8\r
#define P30_CMD_BUFFERED_PROGRAM_CONFIRM          0x00D0\r
#define P30_CMD_BEFP_SETUP                        0x0080\r
#define P30_CMD_BEFP_CONFIRM                      0x00D0\r
\r
// ERASE Commands\r
#define P30_CMD_BLOCK_ERASE_SETUP                 0x0020\r
#define P30_CMD_BLOCK_ERASE_CONFIRM               0x00D0\r
\r
// SUSPEND Commands\r
#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND          0x00B0\r
#define P30_CMD_SUSPEND_RESUME                    0x00D0\r
\r
// BLOCK LOCKING / UNLOCKING Commands\r
#define P30_CMD_LOCK_BLOCK_SETUP                  0x0060\r
#define P30_CMD_LOCK_BLOCK                        0x0001\r
#define P30_CMD_UNLOCK_BLOCK                      0x00D0\r
#define P30_CMD_LOCK_DOWN_BLOCK                   0x002F\r
\r
// PROTECTION Commands\r
#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r
\r
// CONFIGURATION Commands\r
#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r
#define P30_CMD_READ_CONFIGURATION_REGISTER       0x0003\r
\r
#define NOR_FLASH_SIGNATURE                       SIGNATURE_32('n', 'o', 'r', '0')\r
#define INSTANCE_FROM_FVB_THIS(a)                 CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r
#define INSTANCE_FROM_BLKIO_THIS(a)               CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r
#define INSTANCE_FROM_DISKIO_THIS(a)              CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)\r
\r
typedef struct _NOR_FLASH_INSTANCE                NOR_FLASH_INSTANCE;\r
\r
#pragma pack (1)\r
typedef struct {\r
  VENDOR_DEVICE_PATH                  Vendor;\r
  UINT8                               Index;\r
  EFI_DEVICE_PATH_PROTOCOL            End;\r
} NOR_FLASH_DEVICE_PATH;\r
#pragma pack ()\r
\r
struct _NOR_FLASH_INSTANCE {\r
  UINT32                              Signature;\r
  EFI_HANDLE                          Handle;\r
\r
  UINTN                               DeviceBaseAddress;\r
  UINTN                               RegionBaseAddress;\r
  UINTN                               Size;\r
  EFI_LBA                             StartLba;\r
\r
  EFI_BLOCK_IO_PROTOCOL               BlockIoProtocol;\r
  EFI_BLOCK_IO_MEDIA                  Media;\r
  EFI_DISK_IO_PROTOCOL                DiskIoProtocol;\r
\r
  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r
  VOID*                               ShadowBuffer;\r
\r
  NOR_FLASH_DEVICE_PATH               DevicePath;\r
};\r
\r
EFI_STATUS\r
NorFlashReadCfiData (\r
  IN  UINTN                   DeviceBaseAddress,\r
  IN  UINTN                   CFI_Offset,\r
  IN  UINT32                  NumberOfBytes,\r
  OUT UINT32                  *Data\r
  );\r
\r
EFI_STATUS\r
NorFlashWriteBuffer (\r
  IN NOR_FLASH_INSTANCE     *Instance,\r
  IN UINTN                  TargetAddress,\r
  IN UINTN                  BufferSizeInBytes,\r
  IN UINT32                 *Buffer\r
  );\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoReset (\r
  IN EFI_BLOCK_IO_PROTOCOL    *This,\r
  IN BOOLEAN                  ExtendedVerification\r
  );\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoReadBlocks (\r
  IN  EFI_BLOCK_IO_PROTOCOL   *This,\r
  IN  UINT32                  MediaId,\r
  IN  EFI_LBA                 Lba,\r
  IN  UINTN                   BufferSizeInBytes,\r
  OUT VOID                    *Buffer\r
);\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoWriteBlocks (\r
  IN  EFI_BLOCK_IO_PROTOCOL   *This,\r
  IN  UINT32                  MediaId,\r
  IN  EFI_LBA                 Lba,\r
  IN  UINTN                   BufferSizeInBytes,\r
  IN  VOID                    *Buffer\r
);\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoFlushBlocks (\r
  IN EFI_BLOCK_IO_PROTOCOL    *This\r
);\r
\r
//\r
// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashDiskIoReadDisk (\r
  IN EFI_DISK_IO_PROTOCOL         *This,\r
  IN UINT32                       MediaId,\r
  IN UINT64                       Offset,\r
  IN UINTN                        BufferSize,\r
  OUT VOID                        *Buffer\r
  );\r
\r
//\r
// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashDiskIoWriteDisk (\r
  IN EFI_DISK_IO_PROTOCOL         *This,\r
  IN UINT32                       MediaId,\r
  IN UINT64                       Offset,\r
  IN UINTN                        BufferSize,\r
  IN VOID                         *Buffer\r
  );\r
\r
//\r
// NorFlashFvbDxe.c\r
//\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashFvbInitialize (\r
  IN NOR_FLASH_INSTANCE*                            Instance\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbGetAttributes(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  OUT       EFI_FVB_ATTRIBUTES_2                    *Attributes\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbSetAttributes(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN OUT    EFI_FVB_ATTRIBUTES_2                    *Attributes\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbGetPhysicalAddress(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  OUT       EFI_PHYSICAL_ADDRESS                    *Address\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbGetBlockSize(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN        EFI_LBA                                 Lba,\r
  OUT       UINTN                                   *BlockSize,\r
  OUT       UINTN                                   *NumberOfBlocks\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbRead(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN        EFI_LBA                                 Lba,\r
  IN        UINTN                                   Offset,\r
  IN OUT    UINTN                                   *NumBytes,\r
  IN OUT    UINT8                                   *Buffer\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbWrite(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN        EFI_LBA                                 Lba,\r
  IN        UINTN                                   Offset,\r
  IN OUT    UINTN                                   *NumBytes,\r
  IN        UINT8                                   *Buffer\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbEraseBlocks(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  ...\r
  );\r
\r
//\r
// NorFlashDxe.c\r
//\r
\r
EFI_STATUS\r
NorFlashUnlockAndEraseSingleBlock (\r
  IN NOR_FLASH_INSTANCE     *Instance,\r
  IN UINTN                  BlockAddress\r
  );\r
\r
EFI_STATUS\r
NorFlashWriteSingleBlock (\r
  IN        NOR_FLASH_INSTANCE   *Instance,\r
  IN        EFI_LBA               Lba,\r
  IN        UINTN                 Offset,\r
  IN OUT    UINTN                *NumBytes,\r
  IN        UINT8                *Buffer\r
  );\r
\r
EFI_STATUS\r
NorFlashWriteBlocks (\r
  IN  NOR_FLASH_INSTANCE *Instance,\r
  IN  EFI_LBA           Lba,\r
  IN  UINTN             BufferSizeInBytes,\r
  IN  VOID              *Buffer\r
  );\r
\r
EFI_STATUS\r
NorFlashReadBlocks (\r
  IN NOR_FLASH_INSTANCE   *Instance,\r
  IN EFI_LBA              Lba,\r
  IN UINTN                BufferSizeInBytes,\r
  OUT VOID                *Buffer\r
  );\r
\r
EFI_STATUS\r
NorFlashRead (\r
  IN NOR_FLASH_INSTANCE   *Instance,\r
  IN EFI_LBA              Lba,\r
  IN UINTN                Offset,\r
  IN UINTN                BufferSizeInBytes,\r
  OUT VOID                *Buffer\r
  );\r
\r
EFI_STATUS\r
NorFlashWrite (\r
  IN        NOR_FLASH_INSTANCE   *Instance,\r
  IN        EFI_LBA               Lba,\r
  IN        UINTN                 Offset,\r
  IN OUT    UINTN                *NumBytes,\r
  IN        UINT8                *Buffer\r
  );\r
\r
EFI_STATUS\r
NorFlashReset (\r
  IN  NOR_FLASH_INSTANCE *Instance\r
  );\r
\r
#endif /* __NOR_FLASH_DXE_H__ */\r
Commit	Line	Data
1e57a462	1	/** @file NorFlashDxe.h\r
1e57a462	2	\r
2dff0c1a	3	Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
1e57a462	4	\r
f4dfad05	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
1e57a462	6	\r
	7	**/\r
	8	\r
	9	#ifndef __NOR_FLASH_DXE_H__\r
	10	#define __NOR_FLASH_DXE_H__\r
	11	\r
	12	\r
	13	#include <Base.h>\r
	14	#include <PiDxe.h>\r
	15	\r
1dbbfc17 OM	16	#include <Guid/EventGroup.h>\r
1dbbfc17 OM	17	\r
1e57a462	18	#include <Protocol/BlockIo.h>\r
452a9ee1	19	#include <Protocol/DiskIo.h>\r
1e57a462	20	#include <Protocol/FirmwareVolumeBlock.h>\r
	21	\r
	22	#include <Library/DebugLib.h>\r
	23	#include <Library/IoLib.h>\r
	24	#include <Library/NorFlashPlatformLib.h>\r
	25	#include <Library/UefiLib.h>\r
2dff0c1a	26	#include <Library/UefiRuntimeLib.h>\r
1e57a462	27	\r
	28	#define NOR_FLASH_ERASE_RETRY 10\r
	29	\r
	30	// Device access macros\r
	31	// These are necessary because we use 2 x 16bit parts to make up 32bit data\r
	32	\r
	33	#define HIGH_16_BITS 0xFFFF0000\r
	34	#define LOW_16_BITS 0x0000FFFF\r
	35	#define LOW_8_BITS 0x000000FF\r
	36	\r
	37	#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) \| ( value & LOW_16_BITS ) )\r
	38	\r
	39	#define GET_LOW_BYTE(value) ( value & LOW_8_BITS )\r
	40	#define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )\r
	41	\r
	42	// Each command must be sent simultaneously to both chips,\r
	43	// i.e. at the lower 16 bits AND at the higher 16 bits\r
	44	#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))\r
	45	#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) \| ( Cmd & LOW_16_BITS) )\r
	46	#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r
	47	#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )\r
	48	\r
	49	// Status Register Bits\r
	50	#define P30_SR_BIT_WRITE (BIT7 << 16 \| BIT7)\r
	51	#define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 \| BIT6)\r
	52	#define P30_SR_BIT_ERASE (BIT5 << 16 \| BIT5)\r
	53	#define P30_SR_BIT_PROGRAM (BIT4 << 16 \| BIT4)\r
	54	#define P30_SR_BIT_VPP (BIT3 << 16 \| BIT3)\r
	55	#define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 \| BIT2)\r
	56	#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 \| BIT1)\r
	57	#define P30_SR_BIT_BEFP (BIT0 << 16 \| BIT0)\r
	58	\r
	59	// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family\r
	60	\r
	61	// On chip buffer size for buffered programming operations\r
	62	// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.\r
	63	// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes\r
	64	#define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)\r
	65	#define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r
	66	#define MAX_BUFFERED_PROG_ITERATIONS 10000000\r
	67	#define BOUNDARY_OF_32_WORDS 0x7F\r
	68	\r
	69	// CFI Addresses\r
	70	#define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10\r
	71	#define P30_CFI_ADDR_VENDOR_ID 0x13\r
	72	\r
	73	// CFI Data\r
	74	#define CFI_QRY 0x00595251\r
	75	\r
	76	// READ Commands\r
	77	#define P30_CMD_READ_DEVICE_ID 0x0090\r
	78	#define P30_CMD_READ_STATUS_REGISTER 0x0070\r
	79	#define P30_CMD_CLEAR_STATUS_REGISTER 0x0050\r
	80	#define P30_CMD_READ_ARRAY 0x00FF\r
	81	#define P30_CMD_READ_CFI_QUERY 0x0098\r
	82	\r
	83	// WRITE Commands\r
	84	#define P30_CMD_WORD_PROGRAM_SETUP 0x0040\r
	85	#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010\r
	86	#define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8\r
	87	#define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0\r
	88	#define P30_CMD_BEFP_SETUP 0x0080\r
	89	#define P30_CMD_BEFP_CONFIRM 0x00D0\r
	90	\r
91	// ERASE Commands\r
92	#define P30_CMD_BLOCK_ERASE_SETUP 0x0020\r
93	#define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0\r
94	\r
95	// SUSPEND Commands\r
96	#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0\r
97	#define P30_CMD_SUSPEND_RESUME 0x00D0\r
98	\r
99	// BLOCK LOCKING / UNLOCKING Commands\r
100	#define P30_CMD_LOCK_BLOCK_SETUP 0x0060\r
101	#define P30_CMD_LOCK_BLOCK 0x0001\r
102	#define P30_CMD_UNLOCK_BLOCK 0x00D0\r
103	#define P30_CMD_LOCK_DOWN_BLOCK 0x002F\r
104	\r
105	// PROTECTION Commands\r
106	#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r
107	\r
108	// CONFIGURATION Commands\r
109	#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r
110	#define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003\r
111	\r
112	#define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')\r
113	#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r
114	#define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r
452a9ee1	115	#define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)\r
1e57a462	116	\r
	117	typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;\r
	118	\r
4ef11358	119	#pragma pack (1)\r
1e57a462	120	typedef struct {\r
1e57a462	121	VENDOR_DEVICE_PATH Vendor;\r
8b902534	122	UINT8 Index;\r
1e57a462	123	EFI_DEVICE_PATH_PROTOCOL End;\r
1e57a462	124	} NOR_FLASH_DEVICE_PATH;\r
4ef11358	125	#pragma pack ()\r
1e57a462	126	\r
	127	struct _NOR_FLASH_INSTANCE {\r
	128	UINT32 Signature;\r
	129	EFI_HANDLE Handle;\r
	130	\r
1e57a462	131	UINTN DeviceBaseAddress;\r
	132	UINTN RegionBaseAddress;\r
	133	UINTN Size;\r
	134	EFI_LBA StartLba;\r
	135	\r
	136	EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;\r
	137	EFI_BLOCK_IO_MEDIA Media;\r
452a9ee1	138	EFI_DISK_IO_PROTOCOL DiskIoProtocol;\r
1e57a462	139	\r
1e57a462	140	EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r
452a9ee1	141	VOID* ShadowBuffer;\r
1e57a462	142	\r
91c38d4e	143	NOR_FLASH_DEVICE_PATH DevicePath;\r
1e57a462	144	};\r
	145	\r
	146	EFI_STATUS\r
	147	NorFlashReadCfiData (\r
	148	IN UINTN DeviceBaseAddress,\r
	149	IN UINTN CFI_Offset,\r
	150	IN UINT32 NumberOfBytes,\r
	151	OUT UINT32 *Data\r
	152	);\r
	153	\r
	154	EFI_STATUS\r
	155	NorFlashWriteBuffer (\r
	156	IN NOR_FLASH_INSTANCE *Instance,\r
	157	IN UINTN TargetAddress,\r
	158	IN UINTN BufferSizeInBytes,\r
	159	IN UINT32 *Buffer\r
	160	);\r
	161	\r
	162	//\r
	163	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset\r
	164	//\r
	165	EFI_STATUS\r
	166	EFIAPI\r
	167	NorFlashBlockIoReset (\r
	168	IN EFI_BLOCK_IO_PROTOCOL *This,\r
	169	IN BOOLEAN ExtendedVerification\r
	170	);\r
	171	\r
	172	//\r
	173	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks\r
	174	//\r
	175	EFI_STATUS\r
	176	EFIAPI\r
	177	NorFlashBlockIoReadBlocks (\r
	178	IN EFI_BLOCK_IO_PROTOCOL *This,\r
	179	IN UINT32 MediaId,\r
	180	IN EFI_LBA Lba,\r
	181	IN UINTN BufferSizeInBytes,\r
	182	OUT VOID *Buffer\r
	183	);\r
	184	\r
	185	//\r
	186	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks\r
	187	//\r
	188	EFI_STATUS\r
	189	EFIAPI\r
	190	NorFlashBlockIoWriteBlocks (\r
	191	IN EFI_BLOCK_IO_PROTOCOL *This,\r
	192	IN UINT32 MediaId,\r
	193	IN EFI_LBA Lba,\r
	194	IN UINTN BufferSizeInBytes,\r
	195	IN VOID *Buffer\r
	196	);\r
	197	\r
	198	//\r
	199	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks\r
	200	//\r
	201	EFI_STATUS\r
	202	EFIAPI\r
	203	NorFlashBlockIoFlushBlocks (\r
	204	IN EFI_BLOCK_IO_PROTOCOL *This\r
	205	);\r
	206	\r
452a9ee1 BJ	207	//\r
	208	// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk\r
	209	//\r
	210	EFI_STATUS\r
	211	EFIAPI\r
	212	NorFlashDiskIoReadDisk (\r
	213	IN EFI_DISK_IO_PROTOCOL *This,\r
	214	IN UINT32 MediaId,\r
	215	IN UINT64 Offset,\r
	216	IN UINTN BufferSize,\r
	217	OUT VOID *Buffer\r
	218	);\r
	219	\r
	220	//\r
	221	// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk\r
	222	//\r
	223	EFI_STATUS\r
	224	EFIAPI\r
	225	NorFlashDiskIoWriteDisk (\r
	226	IN EFI_DISK_IO_PROTOCOL *This,\r
	227	IN UINT32 MediaId,\r
	228	IN UINT64 Offset,\r
	229	IN UINTN BufferSize,\r
	230	IN VOID *Buffer\r
	231	);\r
1e57a462	232	\r
	233	//\r
	234	// NorFlashFvbDxe.c\r
	235	//\r
	236	\r
	237	EFI_STATUS\r
	238	EFIAPI\r
	239	NorFlashFvbInitialize (\r
	240	IN NOR_FLASH_INSTANCE* Instance\r
	241	);\r
	242	\r
	243	EFI_STATUS\r
	244	EFIAPI\r
	245	FvbGetAttributes(\r
	246	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
	247	OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
	248	);\r
	249	\r
	250	EFI_STATUS\r
	251	EFIAPI\r
	252	FvbSetAttributes(\r
	253	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
	254	IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
	255	);\r
	256	\r
	257	EFI_STATUS\r
	258	EFIAPI\r
	259	FvbGetPhysicalAddress(\r
	260	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
	261	OUT EFI_PHYSICAL_ADDRESS *Address\r
	262	);\r
	263	\r
	264	EFI_STATUS\r
	265	EFIAPI\r
	266	FvbGetBlockSize(\r
	267	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
	268	IN EFI_LBA Lba,\r
	269	OUT UINTN *BlockSize,\r
	270	OUT UINTN *NumberOfBlocks\r
	271	);\r
	272	\r
	273	EFI_STATUS\r
	274	EFIAPI\r
	275	FvbRead(\r
	276	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
	277	IN EFI_LBA Lba,\r
	278	IN UINTN Offset,\r
	279	IN OUT UINTN *NumBytes,\r
	280	IN OUT UINT8 *Buffer\r
	281	);\r
	282	\r
	283	EFI_STATUS\r
	284	EFIAPI\r
	285	FvbWrite(\r
	286	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
	287	IN EFI_LBA Lba,\r
	288	IN UINTN Offset,\r
	289	IN OUT UINTN *NumBytes,\r
	290	IN UINT8 *Buffer\r
	291	);\r
	292	\r
	293	EFI_STATUS\r
	294	EFIAPI\r
	295	FvbEraseBlocks(\r
296	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
297	...\r
298	);\r
299	\r
300	//\r
301	// NorFlashDxe.c\r
302	//\r
303	\r
304	EFI_STATUS\r
305	NorFlashUnlockAndEraseSingleBlock (\r
306	IN NOR_FLASH_INSTANCE *Instance,\r
307	IN UINTN BlockAddress\r
308	);\r
309	\r
310	EFI_STATUS\r
311	NorFlashWriteSingleBlock (\r
452a9ee1 BJ	312	IN NOR_FLASH_INSTANCE *Instance,\r
	313	IN EFI_LBA Lba,\r
	314	IN UINTN Offset,\r
	315	IN OUT UINTN *NumBytes,\r
	316	IN UINT8 *Buffer\r
1e57a462	317	);\r
	318	\r
	319	EFI_STATUS\r
	320	NorFlashWriteBlocks (\r
	321	IN NOR_FLASH_INSTANCE *Instance,\r
	322	IN EFI_LBA Lba,\r
	323	IN UINTN BufferSizeInBytes,\r
	324	IN VOID *Buffer\r
	325	);\r
	326	\r
	327	EFI_STATUS\r
	328	NorFlashReadBlocks (\r
	329	IN NOR_FLASH_INSTANCE *Instance,\r
	330	IN EFI_LBA Lba,\r
	331	IN UINTN BufferSizeInBytes,\r
	332	OUT VOID *Buffer\r
	333	);\r
	334	\r
518c243d HL	335	EFI_STATUS\r
	336	NorFlashRead (\r
	337	IN NOR_FLASH_INSTANCE *Instance,\r
	338	IN EFI_LBA Lba,\r
	339	IN UINTN Offset,\r
	340	IN UINTN BufferSizeInBytes,\r
	341	OUT VOID *Buffer\r
	342	);\r
	343	\r
452a9ee1 BJ	344	EFI_STATUS\r
	345	NorFlashWrite (\r
	346	IN NOR_FLASH_INSTANCE *Instance,\r
	347	IN EFI_LBA Lba,\r
	348	IN UINTN Offset,\r
	349	IN OUT UINTN *NumBytes,\r
	350	IN UINT8 *Buffer\r
	351	);\r
	352	\r
1e57a462	353	EFI_STATUS\r
	354	NorFlashReset (\r
	355	IN NOR_FLASH_INSTANCE *Instance\r
	356	);\r
	357	\r
	358	#endif /* __NOR_FLASH_DXE_H__ */\r