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5a62a8b7 | 1 | /** @file\r |
5a5440d0 PG |
2 | \r |
3 | Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r | |
4 | \r | |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
6 | \r | |
5a62a8b7 | 7 | **/\r |
8 | \r | |
5a62a8b7 | 9 | #ifndef __PL061_GPIO_H__\r |
10 | #define __PL061_GPIO_H__\r | |
11 | \r | |
5a62a8b7 | 12 | #include <Protocol/EmbeddedGpio.h>\r |
5a62a8b7 | 13 | \r |
0db25ccc | 14 | // PL061 GPIO Registers\r |
40b0b23e MK |
15 | #define PL061_GPIO_DATA_REG_OFFSET ((UINTN) 0x000)\r |
16 | #define PL061_GPIO_DATA_REG 0x000\r | |
17 | #define PL061_GPIO_DIR_REG 0x400\r | |
18 | #define PL061_GPIO_IS_REG 0x404\r | |
19 | #define PL061_GPIO_IBE_REG 0x408\r | |
20 | #define PL061_GPIO_IEV_REG 0x40C\r | |
21 | #define PL061_GPIO_IE_REG 0x410\r | |
22 | #define PL061_GPIO_RIS_REG 0x414\r | |
23 | #define PL061_GPIO_MIS_REG 0x410\r | |
24 | #define PL061_GPIO_IC_REG 0x41C\r | |
25 | #define PL061_GPIO_AFSEL_REG 0x420\r | |
26 | \r | |
27 | #define PL061_GPIO_PERIPH_ID0 0xFE0\r | |
28 | #define PL061_GPIO_PERIPH_ID1 0xFE4\r | |
29 | #define PL061_GPIO_PERIPH_ID2 0xFE8\r | |
30 | #define PL061_GPIO_PERIPH_ID3 0xFEC\r | |
31 | \r | |
32 | #define PL061_GPIO_PCELL_ID0 0xFF0\r | |
33 | #define PL061_GPIO_PCELL_ID1 0xFF4\r | |
34 | #define PL061_GPIO_PCELL_ID2 0xFF8\r | |
35 | #define PL061_GPIO_PCELL_ID3 0xFFC\r | |
36 | \r | |
37 | #define PL061_GPIO_PINS 8\r | |
5a62a8b7 | 38 | \r |
0db25ccc | 39 | // All bits low except one bit high, native bit length\r |
40b0b23e | 40 | #define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))\r |
5a62a8b7 | 41 | \r |
40b0b23e | 42 | #endif // __PL061_GPIO_H__\r |