projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 5a62a8b7 | 1 | /** @file\r |
| 2 | *\r | |
| 0db25ccc | 3 | * Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r |
| 5a62a8b7 | 4 | *\r |
| f4dfad05 | 5 | * SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 5a62a8b7 | 6 | *\r |
| 7 | **/\r | |
| 8 | \r | |
| 9 | \r | |
| 10 | #ifndef __PL061_GPIO_H__\r | |
| 11 | #define __PL061_GPIO_H__\r | |
| 12 | \r | |
| 5a62a8b7 | 13 | #include <Protocol/EmbeddedGpio.h>\r |
| 5a62a8b7 | 14 | \r |
| 0db25ccc | 15 | // PL061 GPIO Registers\r |
| 328d8cfa | 16 | #define PL061_GPIO_DATA_REG_OFFSET ((UINTN) 0x000)\r |
| 727894d5 HZ |
17 | #define PL061_GPIO_DATA_REG 0x000\r |
| 18 | #define PL061_GPIO_DIR_REG 0x400\r | |
| 19 | #define PL061_GPIO_IS_REG 0x404\r | |
| 20 | #define PL061_GPIO_IBE_REG 0x408\r | |
| 21 | #define PL061_GPIO_IEV_REG 0x40C\r | |
| 22 | #define PL061_GPIO_IE_REG 0x410\r | |
| 23 | #define PL061_GPIO_RIS_REG 0x414\r | |
| 24 | #define PL061_GPIO_MIS_REG 0x410\r | |
| 25 | #define PL061_GPIO_IC_REG 0x41C\r | |
| 26 | #define PL061_GPIO_AFSEL_REG 0x420\r | |
| 27 | \r | |
| 28 | #define PL061_GPIO_PERIPH_ID0 0xFE0\r | |
| 29 | #define PL061_GPIO_PERIPH_ID1 0xFE4\r | |
| 30 | #define PL061_GPIO_PERIPH_ID2 0xFE8\r | |
| 31 | #define PL061_GPIO_PERIPH_ID3 0xFEC\r | |
| 32 | \r | |
| 33 | #define PL061_GPIO_PCELL_ID0 0xFF0\r | |
| 34 | #define PL061_GPIO_PCELL_ID1 0xFF4\r | |
| 35 | #define PL061_GPIO_PCELL_ID2 0xFF8\r | |
| 36 | #define PL061_GPIO_PCELL_ID3 0xFFC\r | |
| 37 | \r | |
| 38 | #define PL061_GPIO_PINS 8\r | |
| 5a62a8b7 | 39 | \r |
| 0db25ccc | 40 | // All bits low except one bit high, native bit length\r |
| 5a62a8b7 | 41 | #define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))\r |
| 5a62a8b7 | 42 | \r |
| 43 | #endif // __PL061_GPIO_H__\r |