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1d5d0ae9 | 1 | /** @file |
2 | Template for Timer Architecture Protocol driver of the ARM flavor | |
3 | ||
4 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> | |
5 | ||
6 | This program and the accompanying materials | |
7 | are licensed and made available under the terms and conditions of the BSD License | |
8 | which accompanies this distribution. The full text of the license may be found at | |
9 | http://opensource.org/licenses/bsd-license.php | |
10 | ||
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
13 | ||
14 | **/ | |
15 | ||
16 | ||
17 | #include <PiDxe.h> | |
18 | ||
19 | #include <Library/BaseLib.h> | |
20 | #include <Library/DebugLib.h> | |
21 | #include <Library/BaseMemoryLib.h> | |
22 | #include <Library/UefiBootServicesTableLib.h> | |
23 | #include <Library/UefiLib.h> | |
24 | #include <Library/PcdLib.h> | |
25 | #include <Library/IoLib.h> | |
26 | ||
27 | #include <Protocol/Timer.h> | |
28 | #include <Protocol/HardwareInterrupt.h> | |
29 | ||
30 | #include <Drivers/SP804Timer.h> | |
5cc45b70 | 31 | |
32 | #define SP804_TIMER_PERIODIC_BASE (UINTN)PcdGet32 (PcdSP804TimerPeriodicBase) | |
33 | #define SP804_TIMER_METRONOME_BASE (UINTN)PcdGet32 (PcdSP804TimerMetronomeBase) | |
34 | #define SP804_TIMER_PERFORMANCE_BASE (UINTN)PcdGet32 (PcdSP804TimerPerformanceBase) | |
1d5d0ae9 | 35 | |
36 | // The notification function to call on every timer interrupt. | |
37 | volatile EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL; | |
38 | EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; | |
39 | ||
40 | // The current period of the timer interrupt | |
41 | volatile UINT64 mTimerPeriod = 0; | |
42 | ||
43 | // Cached copy of the Hardware Interrupt protocol instance | |
44 | EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL; | |
45 | ||
46 | // Cached interrupt vector | |
47 | UINTN gVector; | |
48 | ||
1d5d0ae9 | 49 | |
50 | /** | |
51 | ||
52 | C Interrupt Handler called in the interrupt context when Source interrupt is active. | |
53 | ||
54 | ||
55 | @param Source Source of the interrupt. Hardware routing off a specific platform defines | |
56 | what source means. | |
57 | ||
58 | @param SystemContext Pointer to system register context. Mostly used by debuggers and will | |
59 | update the system context after the return from the interrupt if | |
60 | modified. Don't change these values unless you know what you are doing | |
61 | ||
62 | **/ | |
63 | VOID | |
64 | EFIAPI | |
65 | TimerInterruptHandler ( | |
66 | IN HARDWARE_INTERRUPT_SOURCE Source, | |
67 | IN EFI_SYSTEM_CONTEXT SystemContext | |
68 | ) | |
69 | { | |
70 | EFI_TPL OriginalTPL; | |
71 | ||
72 | // | |
73 | // DXE core uses this callback for the EFI timer tick. The DXE core uses locks | |
74 | // that raise to TPL_HIGH and then restore back to current level. Thus we need | |
75 | // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick. | |
76 | // | |
77 | OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); | |
78 | ||
e100fa8c | 79 | // If the interrupt is shared then we must check if this interrupt source is the one associated to this Timer |
5cc45b70 | 80 | if (MmioRead32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_MSK_INT_STS_REG) != 0) { |
e100fa8c | 81 | // clear the periodic interrupt |
5cc45b70 | 82 | MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_INT_CLR_REG, 0); |
1d5d0ae9 | 83 | |
e100fa8c | 84 | // signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers |
85 | gInterrupt->EndOfInterrupt (gInterrupt, Source); | |
1d5d0ae9 | 86 | |
e100fa8c | 87 | if (mTimerNotifyFunction) { |
88 | mTimerNotifyFunction (mTimerPeriod); | |
89 | } | |
1d5d0ae9 | 90 | } |
91 | ||
92 | gBS->RestoreTPL (OriginalTPL); | |
93 | } | |
94 | ||
95 | /** | |
96 | This function registers the handler NotifyFunction so it is called every time | |
97 | the timer interrupt fires. It also passes the amount of time since the last | |
98 | handler call to the NotifyFunction. If NotifyFunction is NULL, then the | |
99 | handler is unregistered. If the handler is registered, then EFI_SUCCESS is | |
100 | returned. If the CPU does not support registering a timer interrupt handler, | |
101 | then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler | |
102 | when a handler is already registered, then EFI_ALREADY_STARTED is returned. | |
103 | If an attempt is made to unregister a handler when a handler is not registered, | |
104 | then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to | |
105 | register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR | |
106 | is returned. | |
107 | ||
108 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
109 | @param NotifyFunction The function to call when a timer interrupt fires. This | |
110 | function executes at TPL_HIGH_LEVEL. The DXE Core will | |
111 | register a handler for the timer interrupt, so it can know | |
112 | how much time has passed. This information is used to | |
113 | signal timer based events. NULL will unregister the handler. | |
114 | @retval EFI_SUCCESS The timer handler was registered. | |
115 | @retval EFI_UNSUPPORTED The platform does not support timer interrupts. | |
116 | @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already | |
117 | registered. | |
118 | @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not | |
119 | previously registered. | |
120 | @retval EFI_DEVICE_ERROR The timer handler could not be registered. | |
121 | ||
122 | **/ | |
123 | EFI_STATUS | |
124 | EFIAPI | |
125 | TimerDriverRegisterHandler ( | |
126 | IN EFI_TIMER_ARCH_PROTOCOL *This, | |
127 | IN EFI_TIMER_NOTIFY NotifyFunction | |
128 | ) | |
129 | { | |
130 | if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) { | |
131 | return EFI_INVALID_PARAMETER; | |
132 | } | |
133 | ||
134 | if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) { | |
135 | return EFI_ALREADY_STARTED; | |
136 | } | |
137 | ||
138 | mTimerNotifyFunction = NotifyFunction; | |
139 | ||
140 | return EFI_SUCCESS; | |
141 | } | |
142 | ||
143 | /** | |
5cc45b70 | 144 | Make sure all Dual Timers are disabled |
1d5d0ae9 | 145 | **/ |
146 | VOID | |
147 | EFIAPI | |
148 | ExitBootServicesEvent ( | |
149 | IN EFI_EVENT Event, | |
150 | IN VOID *Context | |
151 | ) | |
152 | { | |
5cc45b70 | 153 | // Disable 'Periodic Operation' timer if enabled |
154 | if (MmioRead32(SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) { | |
155 | MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, 0); | |
156 | } | |
1d5d0ae9 | 157 | |
5cc45b70 | 158 | // Disable 'Metronome/Delay' timer if enabled |
159 | if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) { | |
160 | MmioAnd32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, 0); | |
161 | } | |
1d5d0ae9 | 162 | |
5cc45b70 | 163 | // Disable 'Performance' timer if enabled |
164 | if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) { | |
165 | MmioAnd32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, 0); | |
166 | } | |
1d5d0ae9 | 167 | } |
168 | ||
169 | /** | |
170 | ||
171 | This function adjusts the period of timer interrupts to the value specified | |
172 | by TimerPeriod. If the timer period is updated, then the selected timer | |
173 | period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If | |
174 | the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. | |
175 | If an error occurs while attempting to update the timer period, then the | |
176 | timer hardware will be put back in its state prior to this call, and | |
177 | EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt | |
178 | is disabled. This is not the same as disabling the CPU's interrupts. | |
179 | Instead, it must either turn off the timer hardware, or it must adjust the | |
180 | interrupt controller so that a CPU interrupt is not generated when the timer | |
181 | interrupt fires. | |
182 | ||
183 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
184 | @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If | |
185 | the timer hardware is not programmable, then EFI_UNSUPPORTED is | |
186 | returned. If the timer is programmable, then the timer period | |
187 | will be rounded up to the nearest timer period that is supported | |
188 | by the timer hardware. If TimerPeriod is set to 0, then the | |
189 | timer interrupts will be disabled. | |
190 | ||
191 | ||
192 | @retval EFI_SUCCESS The timer period was changed. | |
193 | @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt. | |
194 | @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. | |
195 | ||
196 | **/ | |
197 | EFI_STATUS | |
198 | EFIAPI | |
199 | TimerDriverSetTimerPeriod ( | |
200 | IN EFI_TIMER_ARCH_PROTOCOL *This, | |
201 | IN UINT64 TimerPeriod | |
202 | ) | |
203 | { | |
204 | EFI_STATUS Status; | |
205 | UINT64 TimerTicks; | |
206 | ||
207 | // always disable the timer | |
5cc45b70 | 208 | MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE); |
1d5d0ae9 | 209 | |
210 | if (TimerPeriod == 0) { | |
23792dea | 211 | // Leave timer disabled from above, and... |
1d5d0ae9 | 212 | |
23792dea | 213 | // Disable timer 0/1 interrupt for a TimerPeriod of 0 |
1d5d0ae9 | 214 | Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector); |
215 | } else { | |
216 | // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10) | |
217 | TimerTicks = DivU64x32 (TimerPeriod, 10); | |
5cc45b70 | 218 | TimerTicks = MultU64x32 (TimerTicks, PcdGet32(PcdSP804TimerFrequencyInMHz)); |
1d5d0ae9 | 219 | |
220 | // if it's larger than 32-bits, pin to highest value | |
221 | if (TimerTicks > 0xffffffff) { | |
222 | ||
223 | TimerTicks = 0xffffffff; | |
224 | ||
225 | } | |
226 | ||
227 | // Program the SP804 timer with the new count value | |
5cc45b70 | 228 | MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_LOAD_REG, TimerTicks); |
1d5d0ae9 | 229 | |
230 | // enable the timer | |
5cc45b70 | 231 | MmioOr32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE); |
1d5d0ae9 | 232 | |
233 | // enable timer 0/1 interrupts | |
234 | Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector); | |
235 | } | |
236 | ||
237 | // Save the new timer period | |
238 | mTimerPeriod = TimerPeriod; | |
239 | return Status; | |
240 | } | |
241 | ||
242 | /** | |
243 | This function retrieves the period of timer interrupts in 100 ns units, | |
244 | returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod | |
245 | is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is | |
246 | returned, then the timer is currently disabled. | |
247 | ||
248 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
249 | @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If | |
250 | 0 is returned, then the timer is currently disabled. | |
251 | ||
252 | ||
253 | @retval EFI_SUCCESS The timer period was returned in TimerPeriod. | |
254 | @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. | |
255 | ||
256 | **/ | |
257 | EFI_STATUS | |
258 | EFIAPI | |
259 | TimerDriverGetTimerPeriod ( | |
260 | IN EFI_TIMER_ARCH_PROTOCOL *This, | |
261 | OUT UINT64 *TimerPeriod | |
262 | ) | |
263 | { | |
264 | if (TimerPeriod == NULL) { | |
265 | return EFI_INVALID_PARAMETER; | |
266 | } | |
267 | ||
268 | *TimerPeriod = mTimerPeriod; | |
269 | return EFI_SUCCESS; | |
270 | } | |
271 | ||
272 | /** | |
273 | This function generates a soft timer interrupt. If the platform does not support soft | |
274 | timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned. | |
275 | If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler() | |
276 | service, then a soft timer interrupt will be generated. If the timer interrupt is | |
277 | enabled when this service is called, then the registered handler will be invoked. The | |
278 | registered handler should not be able to distinguish a hardware-generated timer | |
279 | interrupt from a software-generated timer interrupt. | |
280 | ||
281 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. | |
282 | ||
283 | @retval EFI_SUCCESS The soft timer interrupt was generated. | |
284 | @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts. | |
285 | ||
286 | **/ | |
287 | EFI_STATUS | |
288 | EFIAPI | |
289 | TimerDriverGenerateSoftInterrupt ( | |
290 | IN EFI_TIMER_ARCH_PROTOCOL *This | |
291 | ) | |
292 | { | |
293 | return EFI_UNSUPPORTED; | |
294 | } | |
295 | ||
296 | /** | |
297 | Interface structure for the Timer Architectural Protocol. | |
298 | ||
299 | @par Protocol Description: | |
300 | This protocol provides the services to initialize a periodic timer | |
301 | interrupt, and to register a handler that is called each time the timer | |
302 | interrupt fires. It may also provide a service to adjust the rate of the | |
303 | periodic timer interrupt. When a timer interrupt occurs, the handler is | |
304 | passed the amount of time that has passed since the previous timer | |
305 | interrupt. | |
306 | ||
307 | @param RegisterHandler | |
308 | Registers a handler that will be called each time the | |
309 | timer interrupt fires. TimerPeriod defines the minimum | |
310 | time between timer interrupts, so TimerPeriod will also | |
311 | be the minimum time between calls to the registered | |
312 | handler. | |
313 | ||
314 | @param SetTimerPeriod | |
315 | Sets the period of the timer interrupt in 100 nS units. | |
316 | This function is optional, and may return EFI_UNSUPPORTED. | |
317 | If this function is supported, then the timer period will | |
318 | be rounded up to the nearest supported timer period. | |
319 | ||
320 | ||
321 | @param GetTimerPeriod | |
322 | Retrieves the period of the timer interrupt in 100 nS units. | |
323 | ||
324 | @param GenerateSoftInterrupt | |
325 | Generates a soft timer interrupt that simulates the firing of | |
326 | the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for | |
327 | a period of time. | |
328 | ||
329 | **/ | |
330 | EFI_TIMER_ARCH_PROTOCOL gTimer = { | |
331 | TimerDriverRegisterHandler, | |
332 | TimerDriverSetTimerPeriod, | |
333 | TimerDriverGetTimerPeriod, | |
334 | TimerDriverGenerateSoftInterrupt | |
335 | }; | |
336 | ||
337 | ||
338 | /** | |
339 | Initialize the state information for the Timer Architectural Protocol and | |
340 | the Timer Debug support protocol that allows the debugger to break into a | |
341 | running program. | |
342 | ||
343 | @param ImageHandle of the loaded driver | |
344 | @param SystemTable Pointer to the System Table | |
345 | ||
346 | @retval EFI_SUCCESS Protocol registered | |
347 | @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure | |
348 | @retval EFI_DEVICE_ERROR Hardware problems | |
349 | ||
350 | **/ | |
351 | EFI_STATUS | |
352 | EFIAPI | |
353 | TimerInitialize ( | |
354 | IN EFI_HANDLE ImageHandle, | |
355 | IN EFI_SYSTEM_TABLE *SystemTable | |
356 | ) | |
357 | { | |
358 | EFI_HANDLE Handle = NULL; | |
359 | EFI_STATUS Status; | |
360 | ||
361 | // Find the interrupt controller protocol. ASSERT if not found. | |
362 | Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt); | |
363 | ASSERT_EFI_ERROR (Status); | |
364 | ||
1d5d0ae9 | 365 | // Disable the timer |
366 | Status = TimerDriverSetTimerPeriod (&gTimer, 0); | |
367 | ASSERT_EFI_ERROR (Status); | |
368 | ||
369 | // Install interrupt handler | |
5cc45b70 | 370 | gVector = PcdGet32(PcdSP804TimerPeriodicInterruptNum); |
1d5d0ae9 | 371 | Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler); |
372 | ASSERT_EFI_ERROR (Status); | |
373 | ||
1d5d0ae9 | 374 | // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled |
5cc45b70 | 375 | MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE); |
1d5d0ae9 | 376 | |
377 | // Set up default timer | |
378 | Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD | |
379 | ASSERT_EFI_ERROR (Status); | |
380 | ||
381 | // Install the Timer Architectural Protocol onto a new handle | |
382 | Status = gBS->InstallMultipleProtocolInterfaces( | |
383 | &Handle, | |
384 | &gEfiTimerArchProtocolGuid, &gTimer, | |
385 | NULL | |
386 | ); | |
387 | ASSERT_EFI_ERROR(Status); | |
388 | ||
389 | // Register for an ExitBootServicesEvent | |
390 | Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); | |
391 | ASSERT_EFI_ERROR (Status); | |
392 | ||
393 | return Status; | |
394 | } |