33e7c2ab |
1 | /** @file |
2 | * |
3 | * Copyright (c) 2011, ARM Limited. All rights reserved. |
4 | * |
5 | * This program and the accompanying materials |
6 | * are licensed and made available under the terms and conditions of the BSD License |
7 | * which accompanies this distribution. The full text of the license may be found at |
8 | * http://opensource.org/licenses/bsd-license.php |
9 | * |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. |
12 | * |
13 | **/ |
14 | |
15 | |
16 | #include <PiDxe.h> |
17 | |
18 | #include <Library/BaseLib.h> |
33e7c2ab |
19 | #include <Library/BaseMemoryLib.h> |
5cc45b70 |
20 | #include <Library/DebugLib.h> |
21 | #include <Library/IoLib.h> |
22 | #include <Library/PcdLib.h> |
33e7c2ab |
23 | #include <Library/UefiBootServicesTableLib.h> |
24 | #include <Library/UefiRuntimeServicesTableLib.h> |
25 | #include <Library/UefiLib.h> |
33e7c2ab |
26 | |
27 | #include <Protocol/WatchdogTimer.h> |
33e7c2ab |
28 | #include <Drivers/SP805Watchdog.h> |
29 | |
30 | /** |
31 | Interface structure for the Watchdog Architectural Protocol. |
32 | |
33 | @par Protocol Description: |
34 | This protocol provides a service to set the amount of time to wait |
35 | before firing the watchdog timer, and it also provides a service to |
36 | register a handler that is invoked when the watchdog timer fires. |
37 | |
38 | @par When the watchdog timer fires, control will be passed to a handler |
39 | if one has been registered. If no handler has been registered, |
40 | or the registered handler returns, then the system will be |
41 | reset by calling the Runtime Service ResetSystem(). |
42 | |
43 | @param RegisterHandler |
44 | Registers a handler that will be called each time the |
45 | watchdogtimer interrupt fires. TimerPeriod defines the minimum |
46 | time between timer interrupts, so TimerPeriod will also |
47 | be the minimum time between calls to the registered |
48 | handler. |
49 | NOTE: If the watchdog resets the system in hardware, then |
50 | this function will not have any chance of executing. |
51 | |
52 | @param SetTimerPeriod |
53 | Sets the period of the timer interrupt in 100 nS units. |
54 | This function is optional, and may return EFI_UNSUPPORTED. |
55 | If this function is supported, then the timer period will |
56 | be rounded up to the nearest supported timer period. |
57 | |
58 | @param GetTimerPeriod |
59 | Retrieves the period of the timer interrupt in 100 nS units. |
60 | |
61 | **/ |
62 | EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = { |
63 | (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) SP805RegisterHandler, |
64 | (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) SP805SetTimerPeriod, |
65 | (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) SP805GetTimerPeriod |
66 | }; |
67 | |
68 | EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; |
69 | |
70 | BOOLEAN mSP805Initialized = FALSE; |
71 | |
72 | EFI_STATUS |
73 | SP805Identify ( |
74 | VOID |
75 | ) |
76 | { |
77 | // Check if this is a PrimeCell Peripheral |
5cc45b70 |
78 | if ( (MmioRead8 (SP805_WDOG_PCELL_ID0) != 0x0D) |
79 | || (MmioRead8 (SP805_WDOG_PCELL_ID1) != 0xF0) |
80 | || (MmioRead8 (SP805_WDOG_PCELL_ID2) != 0x05) |
81 | || (MmioRead8 (SP805_WDOG_PCELL_ID3) != 0xB1)) { |
33e7c2ab |
82 | return EFI_NOT_FOUND; |
83 | } |
84 | |
85 | // Check if this PrimeCell Peripheral is the SP805 Watchdog Timer |
5cc45b70 |
86 | if ( (MmioRead8 (SP805_WDOG_PERIPH_ID0) != 0x05) |
87 | || (MmioRead8 (SP805_WDOG_PERIPH_ID1) != 0x18) |
88 | || ((MmioRead8 (SP805_WDOG_PERIPH_ID2) & 0x0000000F) != 0x04) |
89 | || (MmioRead8 (SP805_WDOG_PERIPH_ID3) != 0x00)) { |
33e7c2ab |
90 | return EFI_NOT_FOUND; |
91 | } |
92 | |
93 | return EFI_SUCCESS; |
94 | } |
95 | |
96 | /** |
97 | Make sure the SP805 registers are unlocked for writing. |
98 | |
99 | Note: The SP805 Watchdog Timer supports locking of its registers, |
100 | i.e. it inhibits all writes to avoid rogue software accidentally |
101 | corrupting their contents. |
102 | **/ |
103 | inline |
104 | VOID |
105 | SP805Unlock ( |
106 | VOID |
107 | ) |
108 | { |
109 | if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) { |
110 | MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE); |
111 | } |
112 | } |
113 | |
114 | /** |
115 | Make sure the SP805 registers are locked and can not be overwritten. |
116 | |
117 | Note: The SP805 Watchdog Timer supports locking of its registers, |
118 | i.e. it inhibits all writes to avoid rogue software accidentally |
119 | corrupting their contents. |
120 | **/ |
121 | inline |
122 | VOID |
123 | SP805Lock ( |
124 | VOID |
125 | ) |
126 | { |
127 | if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) { |
128 | // To lock it, just write in any number (except the special unlock code). |
129 | MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED); |
130 | } |
131 | } |
132 | |
133 | /** |
134 | Stop the SP805 watchdog timer from counting down by disabling interrupts. |
135 | **/ |
136 | inline |
137 | VOID |
138 | SP805Stop ( |
139 | VOID |
140 | ) |
141 | { |
142 | // Disable interrupts |
143 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) { |
144 | MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN); |
145 | } |
146 | } |
147 | |
148 | /** |
149 | Starts the SP805 counting down by enabling interrupts. |
150 | The count down will start from the value stored in the Load register, |
151 | not from the value where it was previously stopped. |
152 | **/ |
153 | inline |
154 | VOID |
155 | SP805Start ( |
156 | VOID |
157 | ) |
158 | { |
159 | // Enable interrupts |
160 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) { |
161 | MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN); |
162 | } |
163 | } |
164 | |
165 | /** |
166 | On exiting boot services we must make sure the SP805 Watchdog Timer |
167 | is stopped. |
168 | **/ |
169 | VOID |
170 | EFIAPI |
171 | ExitBootServicesEvent ( |
172 | IN EFI_EVENT Event, |
173 | IN VOID *Context |
174 | ) |
175 | { |
176 | SP805Unlock(); |
177 | SP805Stop(); |
178 | SP805Lock(); |
179 | } |
180 | |
181 | /** |
182 | This function registers the handler NotifyFunction so it is called every time |
183 | the watchdog timer expires. It also passes the amount of time since the last |
184 | handler call to the NotifyFunction. |
185 | If NotifyFunction is not NULL and a handler is not already registered, |
186 | then the new handler is registered and EFI_SUCCESS is returned. |
187 | If NotifyFunction is NULL, and a handler is already registered, |
188 | then that handler is unregistered. |
189 | If an attempt is made to register a handler when a handler is already registered, |
190 | then EFI_ALREADY_STARTED is returned. |
191 | If an attempt is made to unregister a handler when a handler is not registered, |
192 | then EFI_INVALID_PARAMETER is returned. |
193 | |
194 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. |
195 | @param NotifyFunction The function to call when a timer interrupt fires. This |
196 | function executes at TPL_HIGH_LEVEL. The DXE Core will |
197 | register a handler for the timer interrupt, so it can know |
198 | how much time has passed. This information is used to |
199 | signal timer based events. NULL will unregister the handler. |
200 | |
201 | @retval EFI_SUCCESS The watchdog timer handler was registered. |
202 | @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already |
203 | registered. |
204 | @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not |
205 | previously registered. |
206 | |
207 | **/ |
208 | EFI_STATUS |
209 | EFIAPI |
210 | SP805RegisterHandler ( |
211 | IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, |
212 | IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction |
213 | ) |
214 | { |
215 | // ERROR: This function is not supported. |
216 | // The hardware watchdog will reset the board |
217 | return EFI_INVALID_PARAMETER; |
218 | } |
219 | |
220 | /** |
221 | |
222 | This function adjusts the period of timer interrupts to the value specified |
223 | by TimerPeriod. If the timer period is updated, then the selected timer |
224 | period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If |
225 | the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. |
226 | If an error occurs while attempting to update the timer period, then the |
227 | timer hardware will be put back in its state prior to this call, and |
228 | EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt |
229 | is disabled. This is not the same as disabling the CPU's interrupts. |
230 | Instead, it must either turn off the timer hardware, or it must adjust the |
231 | interrupt controller so that a CPU interrupt is not generated when the timer |
232 | interrupt fires. |
233 | |
234 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. |
235 | @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If |
236 | the timer hardware is not programmable, then EFI_UNSUPPORTED is |
237 | returned. If the timer is programmable, then the timer period |
238 | will be rounded up to the nearest timer period that is supported |
239 | by the timer hardware. If TimerPeriod is set to 0, then the |
240 | timer interrupts will be disabled. |
241 | |
242 | |
243 | @retval EFI_SUCCESS The timer period was changed. |
244 | @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt. |
245 | @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. |
246 | |
247 | **/ |
248 | EFI_STATUS |
249 | EFIAPI |
250 | SP805SetTimerPeriod ( |
251 | IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, |
252 | IN UINT64 TimerPeriod // In 100ns units |
253 | ) |
254 | { |
255 | EFI_STATUS Status = EFI_SUCCESS; |
256 | UINT64 Ticks64bit; |
257 | |
258 | // Initialize the hardware if not already done |
259 | if( !mSP805Initialized ) { |
260 | Status = SP805Initialize(); |
261 | if (EFI_ERROR(Status)) { |
262 | goto EXIT; |
263 | } |
264 | } |
265 | |
266 | SP805Unlock(); |
267 | |
268 | if( TimerPeriod == 0 ) { |
269 | // This is a watchdog stop request |
270 | SP805Stop(); |
271 | goto EXIT; |
272 | } else { |
273 | // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds |
274 | // The SP805 will count down to ZERO once, generate an interrupt and |
275 | // then it will again reload the initial value and start again. |
276 | // On the second time when it reaches ZERO, it will actually reset the board. |
277 | // Therefore, we need to load half the required delay. |
278 | // |
279 | // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ; |
280 | // |
281 | // i.e.: |
282 | // |
283 | // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ; |
284 | |
3723a71a |
285 | Ticks64bit = DivU64x32(MultU64x32(TimerPeriod, (UINTN)PcdGet32(PcdSP805WatchdogClockFrequencyInHz)), 20000000); |
33e7c2ab |
286 | |
287 | // The registers in the SP805 are only 32 bits |
3723a71a |
288 | if(Ticks64bit > (UINT64)0xFFFFFFFF) { |
33e7c2ab |
289 | // We could load the watchdog with the maximum supported value but |
290 | // if a smaller value was requested, this could have the watchdog |
291 | // triggering before it was intended. |
292 | // Better generate an error to let the caller know. |
293 | Status = EFI_DEVICE_ERROR; |
294 | goto EXIT; |
295 | } |
296 | |
297 | // Update the watchdog with a 32-bit value. |
298 | MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit); |
299 | |
300 | // Start the watchdog |
301 | SP805Start(); |
302 | } |
303 | |
304 | EXIT: |
305 | // Ensure the watchdog is locked before exiting. |
306 | SP805Lock(); |
307 | return Status; |
308 | } |
309 | |
310 | /** |
311 | This function retrieves the period of timer interrupts in 100 ns units, |
312 | returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod |
313 | is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is |
314 | returned, then the timer is currently disabled. |
315 | |
316 | @param This The EFI_TIMER_ARCH_PROTOCOL instance. |
317 | @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If |
318 | 0 is returned, then the timer is currently disabled. |
319 | |
320 | |
321 | @retval EFI_SUCCESS The timer period was returned in TimerPeriod. |
322 | @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. |
323 | |
324 | **/ |
325 | EFI_STATUS |
326 | EFIAPI |
327 | SP805GetTimerPeriod ( |
328 | IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, |
329 | OUT UINT64 *TimerPeriod |
330 | ) |
331 | { |
332 | EFI_STATUS Status = EFI_SUCCESS; |
333 | UINT64 ReturnValue; |
334 | |
335 | if (TimerPeriod == NULL) { |
336 | return EFI_INVALID_PARAMETER; |
337 | } |
338 | |
339 | // Initialize the hardware if not already done |
340 | if( !mSP805Initialized ) { |
341 | Status = SP805Initialize(); |
342 | if (EFI_ERROR(Status)) { |
343 | goto EXIT; |
344 | } |
345 | } |
346 | |
347 | // Check if the watchdog is stopped |
348 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) { |
349 | // It is stopped, so return zero. |
350 | ReturnValue = 0; |
351 | } else { |
352 | // Convert the Watchdog ticks into TimerPeriod |
353 | // Ensure 64bit arithmetic throughout because the Watchdog ticks may already |
354 | // be at the maximum 32 bit value and we still need to multiply that by 600. |
355 | ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 ); |
356 | } |
357 | |
358 | *TimerPeriod = ReturnValue; |
359 | |
360 | EXIT: |
361 | return Status; |
362 | } |
363 | |
364 | /** |
365 | Initialize the state information for the Watchdog Timer Architectural Protocol. |
366 | |
367 | @param ImageHandle of the loaded driver |
368 | @param SystemTable Pointer to the System Table |
369 | |
370 | @retval EFI_SUCCESS Protocol registered |
371 | @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure |
372 | @retval EFI_DEVICE_ERROR Hardware problems |
373 | |
374 | **/ |
375 | EFI_STATUS |
376 | SP805Initialize ( |
377 | VOID |
378 | ) |
379 | { |
380 | EFI_STATUS Status; |
381 | |
382 | // Check if the SP805 hardware watchdog module exists on board |
383 | Status = SP805Identify(); |
384 | if (EFI_ERROR( Status )) { |
385 | Status = EFI_DEVICE_ERROR; |
386 | goto EXIT; |
387 | } |
388 | |
389 | // Unlock access to the SP805 registers |
390 | SP805Unlock(); |
391 | |
392 | // Stop the watchdog from triggering unexpectedly |
393 | SP805Stop(); |
394 | |
395 | // Set the watchdog to reset the board when triggered |
396 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0 ) { |
397 | MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN); |
398 | } |
399 | |
400 | // Prohibit any rogue access to SP805 registers |
401 | SP805Lock(); |
402 | |
403 | mSP805Initialized = TRUE; |
404 | |
405 | EXIT: |
406 | return Status; |
407 | } |
408 | |
409 | EFI_STATUS |
410 | EFIAPI |
411 | SP805InstallProtocol ( |
412 | IN EFI_HANDLE ImageHandle, |
413 | IN EFI_SYSTEM_TABLE *SystemTable |
414 | ) |
415 | { |
416 | EFI_STATUS Status; |
417 | EFI_HANDLE Handle; |
418 | |
419 | // |
420 | // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet. |
421 | // This will avoid conflicts with the universal watchdog |
422 | // |
423 | ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid); |
424 | |
425 | // Register for an ExitBootServicesEvent |
426 | Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); |
427 | if (EFI_ERROR(Status)) { |
428 | Status = EFI_OUT_OF_RESOURCES; |
429 | goto EXIT; |
430 | } |
431 | |
432 | // Install the Timer Architectural Protocol onto a new handle |
433 | Handle = NULL; |
434 | Status = gBS->InstallMultipleProtocolInterfaces( |
435 | &Handle, |
436 | &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer, |
437 | NULL |
438 | ); |
439 | if (EFI_ERROR(Status)) { |
440 | Status = EFI_OUT_OF_RESOURCES; |
441 | goto EXIT; |
442 | } |
443 | |
444 | EXIT: |
445 | if(EFI_ERROR(Status)) { |
446 | // The watchdog failed to initialize |
447 | ASSERT(FALSE); |
448 | } |
449 | return Status; |
450 | } |