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1e57a462 | 1 | /** @file\r |
5a5440d0 PG |
2 | \r |
3 | Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r | |
4 | Copyright (c) 2018, Linaro Limited. All rights reserved.\r | |
5 | \r | |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | \r | |
1e57a462 | 8 | **/\r |
9 | \r | |
10 | \r | |
11 | #include <PiDxe.h>\r | |
12 | \r | |
13 | #include <Library/BaseLib.h>\r | |
14 | #include <Library/BaseMemoryLib.h>\r | |
15 | #include <Library/DebugLib.h>\r | |
16 | #include <Library/IoLib.h>\r | |
1e57a462 | 17 | #include <Library/UefiBootServicesTableLib.h>\r |
5afabd5e | 18 | #include <Library/UefiRuntimeServicesTableLib.h>\r |
1e57a462 | 19 | \r |
5afabd5e | 20 | #include <Protocol/HardwareInterrupt.h>\r |
1e57a462 | 21 | #include <Protocol/WatchdogTimer.h>\r |
b9fddfb8 AB |
22 | \r |
23 | #include "SP805Watchdog.h"\r | |
1e57a462 | 24 | \r |
5afabd5e AB |
25 | STATIC EFI_EVENT mEfiExitBootServicesEvent;\r |
26 | STATIC EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterrupt;\r | |
27 | STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;\r | |
28 | STATIC UINT32 mTimerPeriod;\r | |
1e57a462 | 29 | \r |
30 | /**\r | |
31 | Make sure the SP805 registers are unlocked for writing.\r | |
32 | \r | |
33 | Note: The SP805 Watchdog Timer supports locking of its registers,\r | |
34 | i.e. it inhibits all writes to avoid rogue software accidentally\r | |
35 | corrupting their contents.\r | |
36 | **/\r | |
b2ce4a39 | 37 | STATIC\r |
1e57a462 | 38 | VOID\r |
39 | SP805Unlock (\r | |
40 | VOID\r | |
41 | )\r | |
42 | {\r | |
e3fa3d83 AB |
43 | if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED) {\r |
44 | MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE);\r | |
1e57a462 | 45 | }\r |
46 | }\r | |
47 | \r | |
48 | /**\r | |
49 | Make sure the SP805 registers are locked and can not be overwritten.\r | |
50 | \r | |
51 | Note: The SP805 Watchdog Timer supports locking of its registers,\r | |
52 | i.e. it inhibits all writes to avoid rogue software accidentally\r | |
53 | corrupting their contents.\r | |
54 | **/\r | |
b2ce4a39 | 55 | STATIC\r |
1e57a462 | 56 | VOID\r |
57 | SP805Lock (\r | |
58 | VOID\r | |
59 | )\r | |
60 | {\r | |
e3fa3d83 | 61 | if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED) {\r |
1e57a462 | 62 | // To lock it, just write in any number (except the special unlock code).\r |
e3fa3d83 | 63 | MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED);\r |
1e57a462 | 64 | }\r |
65 | }\r | |
66 | \r | |
5afabd5e AB |
67 | STATIC\r |
68 | VOID\r | |
69 | EFIAPI\r | |
70 | SP805InterruptHandler (\r | |
71 | IN HARDWARE_INTERRUPT_SOURCE Source,\r | |
72 | IN EFI_SYSTEM_CONTEXT SystemContext\r | |
73 | )\r | |
74 | {\r | |
75 | SP805Unlock ();\r | |
76 | MmioWrite32 (SP805_WDOG_INT_CLR_REG, 0); // write of any value clears the irq\r | |
77 | SP805Lock ();\r | |
78 | \r | |
79 | mInterrupt->EndOfInterrupt (mInterrupt, Source);\r | |
80 | \r | |
81 | //\r | |
82 | // The notify function should be called with the elapsed number of ticks\r | |
83 | // since the watchdog was armed, which should exceed the timer period.\r | |
84 | // We don't actually know the elapsed number of ticks, so let's return\r | |
85 | // the timer period plus 1.\r | |
86 | //\r | |
87 | if (mWatchdogNotify != NULL) {\r | |
88 | mWatchdogNotify (mTimerPeriod + 1);\r | |
89 | }\r | |
90 | \r | |
91 | gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, 0, NULL);\r | |
92 | }\r | |
93 | \r | |
1e57a462 | 94 | /**\r |
95 | Stop the SP805 watchdog timer from counting down by disabling interrupts.\r | |
96 | **/\r | |
b2ce4a39 | 97 | STATIC\r |
1e57a462 | 98 | VOID\r |
99 | SP805Stop (\r | |
100 | VOID\r | |
101 | )\r | |
102 | {\r | |
103 | // Disable interrupts\r | |
e3fa3d83 AB |
104 | if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0) {\r |
105 | MmioAnd32 (SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN);\r | |
1e57a462 | 106 | }\r |
107 | }\r | |
108 | \r | |
109 | /**\r | |
110 | Starts the SP805 counting down by enabling interrupts.\r | |
111 | The count down will start from the value stored in the Load register,\r | |
112 | not from the value where it was previously stopped.\r | |
113 | **/\r | |
b2ce4a39 | 114 | STATIC\r |
1e57a462 | 115 | VOID\r |
116 | SP805Start (\r | |
117 | VOID\r | |
118 | )\r | |
119 | {\r | |
120 | // Enable interrupts\r | |
e3fa3d83 AB |
121 | if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0) {\r |
122 | MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);\r | |
1e57a462 | 123 | }\r |
124 | }\r | |
125 | \r | |
126 | /**\r | |
127 | On exiting boot services we must make sure the SP805 Watchdog Timer\r | |
128 | is stopped.\r | |
129 | **/\r | |
e3fa3d83 | 130 | STATIC\r |
1e57a462 | 131 | VOID\r |
132 | EFIAPI\r | |
133 | ExitBootServicesEvent (\r | |
134 | IN EFI_EVENT Event,\r | |
135 | IN VOID *Context\r | |
136 | )\r | |
137 | {\r | |
e3fa3d83 AB |
138 | SP805Unlock ();\r |
139 | SP805Stop ();\r | |
140 | SP805Lock ();\r | |
1e57a462 | 141 | }\r |
142 | \r | |
143 | /**\r | |
144 | This function registers the handler NotifyFunction so it is called every time\r | |
145 | the watchdog timer expires. It also passes the amount of time since the last\r | |
146 | handler call to the NotifyFunction.\r | |
147 | If NotifyFunction is not NULL and a handler is not already registered,\r | |
148 | then the new handler is registered and EFI_SUCCESS is returned.\r | |
149 | If NotifyFunction is NULL, and a handler is already registered,\r | |
150 | then that handler is unregistered.\r | |
151 | If an attempt is made to register a handler when a handler is already registered,\r | |
152 | then EFI_ALREADY_STARTED is returned.\r | |
153 | If an attempt is made to unregister a handler when a handler is not registered,\r | |
154 | then EFI_INVALID_PARAMETER is returned.\r | |
155 | \r | |
156 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
157 | @param NotifyFunction The function to call when a timer interrupt fires. This\r | |
158 | function executes at TPL_HIGH_LEVEL. The DXE Core will\r | |
159 | register a handler for the timer interrupt, so it can know\r | |
160 | how much time has passed. This information is used to\r | |
161 | signal timer based events. NULL will unregister the handler.\r | |
162 | \r | |
163 | @retval EFI_SUCCESS The watchdog timer handler was registered.\r | |
164 | @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already\r | |
165 | registered.\r | |
166 | @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not\r | |
167 | previously registered.\r | |
168 | \r | |
169 | **/\r | |
e3fa3d83 | 170 | STATIC\r |
1e57a462 | 171 | EFI_STATUS\r |
172 | EFIAPI\r | |
173 | SP805RegisterHandler (\r | |
e3fa3d83 | 174 | IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r |
1e57a462 | 175 | IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction\r |
176 | )\r | |
177 | {\r | |
5afabd5e AB |
178 | if (mWatchdogNotify == NULL && NotifyFunction == NULL) {\r |
179 | return EFI_INVALID_PARAMETER;\r | |
180 | }\r | |
181 | \r | |
182 | if (mWatchdogNotify != NULL && NotifyFunction != NULL) {\r | |
183 | return EFI_ALREADY_STARTED;\r | |
184 | }\r | |
185 | \r | |
186 | mWatchdogNotify = NotifyFunction;\r | |
187 | return EFI_SUCCESS;\r | |
1e57a462 | 188 | }\r |
189 | \r | |
190 | /**\r | |
191 | \r | |
192 | This function adjusts the period of timer interrupts to the value specified\r | |
193 | by TimerPeriod. If the timer period is updated, then the selected timer\r | |
194 | period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If\r | |
195 | the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.\r | |
196 | If an error occurs while attempting to update the timer period, then the\r | |
197 | timer hardware will be put back in its state prior to this call, and\r | |
198 | EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt\r | |
199 | is disabled. This is not the same as disabling the CPU's interrupts.\r | |
200 | Instead, it must either turn off the timer hardware, or it must adjust the\r | |
201 | interrupt controller so that a CPU interrupt is not generated when the timer\r | |
202 | interrupt fires.\r | |
203 | \r | |
204 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
205 | @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If\r | |
206 | the timer hardware is not programmable, then EFI_UNSUPPORTED is\r | |
207 | returned. If the timer is programmable, then the timer period\r | |
208 | will be rounded up to the nearest timer period that is supported\r | |
209 | by the timer hardware. If TimerPeriod is set to 0, then the\r | |
210 | timer interrupts will be disabled.\r | |
211 | \r | |
212 | \r | |
213 | @retval EFI_SUCCESS The timer period was changed.\r | |
214 | @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.\r | |
215 | @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.\r | |
216 | \r | |
217 | **/\r | |
e3fa3d83 | 218 | STATIC\r |
1e57a462 | 219 | EFI_STATUS\r |
220 | EFIAPI\r | |
221 | SP805SetTimerPeriod (\r | |
e3fa3d83 | 222 | IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r |
1e57a462 | 223 | IN UINT64 TimerPeriod // In 100ns units\r |
224 | )\r | |
225 | {\r | |
e3fa3d83 | 226 | EFI_STATUS Status;\r |
1e57a462 | 227 | UINT64 Ticks64bit;\r |
228 | \r | |
e3fa3d83 | 229 | SP805Unlock ();\r |
1e57a462 | 230 | \r |
e3fa3d83 AB |
231 | Status = EFI_SUCCESS;\r |
232 | \r | |
233 | if (TimerPeriod == 0) {\r | |
1e57a462 | 234 | // This is a watchdog stop request\r |
e3fa3d83 | 235 | SP805Stop ();\r |
1e57a462 | 236 | } else {\r |
237 | // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds\r | |
5afabd5e | 238 | // The SP805 will count down to zero and generate an interrupt.\r |
1e57a462 | 239 | //\r |
5afabd5e | 240 | // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz);\r |
1e57a462 | 241 | //\r |
242 | // i.e.:\r | |
243 | //\r | |
5afabd5e | 244 | // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 10 MHz ;\r |
1e57a462 | 245 | \r |
e3fa3d83 | 246 | Ticks64bit = MultU64x32 (TimerPeriod, PcdGet32 (PcdSP805WatchdogClockFrequencyInHz));\r |
5afabd5e | 247 | Ticks64bit = DivU64x32 (Ticks64bit, 10 * 1000 * 1000);\r |
1e57a462 | 248 | \r |
249 | // The registers in the SP805 are only 32 bits\r | |
e3fa3d83 | 250 | if (Ticks64bit > MAX_UINT32) {\r |
1e57a462 | 251 | // We could load the watchdog with the maximum supported value but\r |
252 | // if a smaller value was requested, this could have the watchdog\r | |
253 | // triggering before it was intended.\r | |
254 | // Better generate an error to let the caller know.\r | |
255 | Status = EFI_DEVICE_ERROR;\r | |
256 | goto EXIT;\r | |
257 | }\r | |
258 | \r | |
259 | // Update the watchdog with a 32-bit value.\r | |
e3fa3d83 | 260 | MmioWrite32 (SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit);\r |
1e57a462 | 261 | \r |
262 | // Start the watchdog\r | |
e3fa3d83 | 263 | SP805Start ();\r |
1e57a462 | 264 | }\r |
265 | \r | |
5afabd5e AB |
266 | mTimerPeriod = TimerPeriod;\r |
267 | \r | |
e3fa3d83 | 268 | EXIT:\r |
1e57a462 | 269 | // Ensure the watchdog is locked before exiting.\r |
e3fa3d83 | 270 | SP805Lock ();\r |
5afabd5e | 271 | ASSERT_EFI_ERROR (Status);\r |
1e57a462 | 272 | return Status;\r |
273 | }\r | |
274 | \r | |
275 | /**\r | |
276 | This function retrieves the period of timer interrupts in 100 ns units,\r | |
277 | returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod\r | |
278 | is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is\r | |
279 | returned, then the timer is currently disabled.\r | |
280 | \r | |
281 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
282 | @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If\r | |
283 | 0 is returned, then the timer is currently disabled.\r | |
284 | \r | |
285 | \r | |
286 | @retval EFI_SUCCESS The timer period was returned in TimerPeriod.\r | |
287 | @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.\r | |
288 | \r | |
289 | **/\r | |
e3fa3d83 | 290 | STATIC\r |
1e57a462 | 291 | EFI_STATUS\r |
292 | EFIAPI\r | |
293 | SP805GetTimerPeriod (\r | |
e3fa3d83 | 294 | IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r |
1e57a462 | 295 | OUT UINT64 *TimerPeriod\r |
296 | )\r | |
297 | {\r | |
1e57a462 | 298 | if (TimerPeriod == NULL) {\r |
299 | return EFI_INVALID_PARAMETER;\r | |
300 | }\r | |
301 | \r | |
5afabd5e | 302 | *TimerPeriod = mTimerPeriod;\r |
e3fa3d83 | 303 | return EFI_SUCCESS;\r |
1e57a462 | 304 | }\r |
305 | \r | |
306 | /**\r | |
307 | Interface structure for the Watchdog Architectural Protocol.\r | |
308 | \r | |
309 | @par Protocol Description:\r | |
310 | This protocol provides a service to set the amount of time to wait\r | |
311 | before firing the watchdog timer, and it also provides a service to\r | |
312 | register a handler that is invoked when the watchdog timer fires.\r | |
313 | \r | |
314 | @par When the watchdog timer fires, control will be passed to a handler\r | |
315 | if one has been registered. If no handler has been registered,\r | |
316 | or the registered handler returns, then the system will be\r | |
317 | reset by calling the Runtime Service ResetSystem().\r | |
318 | \r | |
319 | @param RegisterHandler\r | |
320 | Registers a handler that will be called each time the\r | |
321 | watchdogtimer interrupt fires. TimerPeriod defines the minimum\r | |
322 | time between timer interrupts, so TimerPeriod will also\r | |
323 | be the minimum time between calls to the registered\r | |
324 | handler.\r | |
325 | NOTE: If the watchdog resets the system in hardware, then\r | |
326 | this function will not have any chance of executing.\r | |
327 | \r | |
328 | @param SetTimerPeriod\r | |
329 | Sets the period of the timer interrupt in 100 nS units.\r | |
330 | This function is optional, and may return EFI_UNSUPPORTED.\r | |
331 | If this function is supported, then the timer period will\r | |
332 | be rounded up to the nearest supported timer period.\r | |
333 | \r | |
334 | @param GetTimerPeriod\r | |
335 | Retrieves the period of the timer interrupt in 100 nS units.\r | |
336 | \r | |
337 | **/\r | |
e3fa3d83 AB |
338 | STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = {\r |
339 | SP805RegisterHandler,\r | |
340 | SP805SetTimerPeriod,\r | |
341 | SP805GetTimerPeriod\r | |
1e57a462 | 342 | };\r |
343 | \r | |
344 | /**\r | |
345 | Initialize the state information for the Watchdog Timer Architectural Protocol.\r | |
346 | \r | |
347 | @param ImageHandle of the loaded driver\r | |
348 | @param SystemTable Pointer to the System Table\r | |
349 | \r | |
350 | @retval EFI_SUCCESS Protocol registered\r | |
351 | @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure\r | |
352 | @retval EFI_DEVICE_ERROR Hardware problems\r | |
353 | \r | |
354 | **/\r | |
355 | EFI_STATUS\r | |
356 | EFIAPI\r | |
357 | SP805Initialize (\r | |
358 | IN EFI_HANDLE ImageHandle,\r | |
359 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
360 | )\r | |
361 | {\r | |
362 | EFI_STATUS Status;\r | |
363 | EFI_HANDLE Handle;\r | |
364 | \r | |
5afabd5e AB |
365 | // Find the interrupt controller protocol. ASSERT if not found.\r |
366 | Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL,\r | |
367 | (VOID **)&mInterrupt);\r | |
368 | ASSERT_EFI_ERROR (Status);\r | |
369 | \r | |
1e57a462 | 370 | // Unlock access to the SP805 registers\r |
371 | SP805Unlock ();\r | |
372 | \r | |
373 | // Stop the watchdog from triggering unexpectedly\r | |
374 | SP805Stop ();\r | |
375 | \r | |
376 | // Set the watchdog to reset the board when triggered\r | |
5afabd5e | 377 | // This is a last resort in case the interrupt handler fails\r |
e3fa3d83 | 378 | if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) {\r |
1e57a462 | 379 | MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN);\r |
380 | }\r | |
381 | \r | |
5afabd5e AB |
382 | // Clear any pending interrupts\r |
383 | MmioWrite32 (SP805_WDOG_INT_CLR_REG, 0); // write of any value clears the irq\r | |
384 | \r | |
1e57a462 | 385 | // Prohibit any rogue access to SP805 registers\r |
e3fa3d83 | 386 | SP805Lock ();\r |
3402aac7 | 387 | \r |
5afabd5e AB |
388 | if (PcdGet32 (PcdSP805WatchdogInterrupt) > 0) {\r |
389 | Status = mInterrupt->RegisterInterruptSource (mInterrupt,\r | |
390 | PcdGet32 (PcdSP805WatchdogInterrupt),\r | |
391 | SP805InterruptHandler);\r | |
392 | if (EFI_ERROR (Status)) {\r | |
393 | DEBUG ((DEBUG_ERROR, "%a: failed to register watchdog interrupt - %r\n",\r | |
394 | __FUNCTION__, Status));\r | |
395 | return Status;\r | |
396 | }\r | |
397 | } else {\r | |
398 | DEBUG ((DEBUG_WARN, "%a: no interrupt specified, running in RESET mode only\n",\r | |
399 | __FUNCTION__));\r | |
400 | }\r | |
401 | \r | |
1e57a462 | 402 | //\r |
403 | // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet.\r | |
404 | // This will avoid conflicts with the universal watchdog\r | |
405 | //\r | |
406 | ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);\r | |
407 | \r | |
408 | // Register for an ExitBootServicesEvent\r | |
e3fa3d83 AB |
409 | Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,\r |
410 | ExitBootServicesEvent, NULL, &mEfiExitBootServicesEvent);\r | |
411 | if (EFI_ERROR (Status)) {\r | |
1e57a462 | 412 | Status = EFI_OUT_OF_RESOURCES;\r |
413 | goto EXIT;\r | |
414 | }\r | |
415 | \r | |
416 | // Install the Timer Architectural Protocol onto a new handle\r | |
417 | Handle = NULL;\r | |
e3fa3d83 | 418 | Status = gBS->InstallMultipleProtocolInterfaces (\r |
1e57a462 | 419 | &Handle,\r |
e3fa3d83 | 420 | &gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,\r |
1e57a462 | 421 | NULL\r |
422 | );\r | |
e3fa3d83 | 423 | if (EFI_ERROR (Status)) {\r |
1e57a462 | 424 | Status = EFI_OUT_OF_RESOURCES;\r |
425 | goto EXIT;\r | |
426 | }\r | |
427 | \r | |
428 | EXIT:\r | |
e3fa3d83 | 429 | ASSERT_EFI_ERROR (Status);\r |
1e57a462 | 430 | return Status;\r |
431 | }\r |