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1e57a462 | 1 | /** @file\r |
2 | *\r | |
b2ce4a39 | 3 | * Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r |
1e57a462 | 4 | *\r |
5 | * This program and the accompanying materials\r | |
6 | * are licensed and made available under the terms and conditions of the BSD License\r | |
7 | * which accompanies this distribution. The full text of the license may be found at\r | |
8 | * http://opensource.org/licenses/bsd-license.php\r | |
9 | *\r | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | *\r | |
13 | **/\r | |
14 | \r | |
15 | \r | |
16 | #include <PiDxe.h>\r | |
17 | \r | |
18 | #include <Library/BaseLib.h>\r | |
19 | #include <Library/BaseMemoryLib.h>\r | |
20 | #include <Library/DebugLib.h>\r | |
21 | #include <Library/IoLib.h>\r | |
22 | #include <Library/PcdLib.h>\r | |
23 | #include <Library/UefiBootServicesTableLib.h>\r | |
24 | #include <Library/UefiRuntimeServicesTableLib.h>\r | |
25 | #include <Library/UefiLib.h>\r | |
26 | \r | |
27 | #include <Protocol/WatchdogTimer.h>\r | |
28 | #include <Drivers/SP805Watchdog.h>\r | |
29 | \r | |
30 | EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;\r | |
31 | \r | |
32 | /**\r | |
33 | Make sure the SP805 registers are unlocked for writing.\r | |
34 | \r | |
35 | Note: The SP805 Watchdog Timer supports locking of its registers,\r | |
36 | i.e. it inhibits all writes to avoid rogue software accidentally\r | |
37 | corrupting their contents.\r | |
38 | **/\r | |
b2ce4a39 | 39 | STATIC\r |
1e57a462 | 40 | VOID\r |
41 | SP805Unlock (\r | |
42 | VOID\r | |
43 | )\r | |
44 | {\r | |
45 | if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) {\r | |
46 | MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE);\r | |
47 | }\r | |
48 | }\r | |
49 | \r | |
50 | /**\r | |
51 | Make sure the SP805 registers are locked and can not be overwritten.\r | |
52 | \r | |
53 | Note: The SP805 Watchdog Timer supports locking of its registers,\r | |
54 | i.e. it inhibits all writes to avoid rogue software accidentally\r | |
55 | corrupting their contents.\r | |
56 | **/\r | |
b2ce4a39 | 57 | STATIC\r |
1e57a462 | 58 | VOID\r |
59 | SP805Lock (\r | |
60 | VOID\r | |
61 | )\r | |
62 | {\r | |
63 | if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) {\r | |
64 | // To lock it, just write in any number (except the special unlock code).\r | |
65 | MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED);\r | |
66 | }\r | |
67 | }\r | |
68 | \r | |
69 | /**\r | |
70 | Stop the SP805 watchdog timer from counting down by disabling interrupts.\r | |
71 | **/\r | |
b2ce4a39 | 72 | STATIC\r |
1e57a462 | 73 | VOID\r |
74 | SP805Stop (\r | |
75 | VOID\r | |
76 | )\r | |
77 | {\r | |
78 | // Disable interrupts\r | |
79 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) {\r | |
80 | MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN);\r | |
81 | }\r | |
82 | }\r | |
83 | \r | |
84 | /**\r | |
85 | Starts the SP805 counting down by enabling interrupts.\r | |
86 | The count down will start from the value stored in the Load register,\r | |
87 | not from the value where it was previously stopped.\r | |
88 | **/\r | |
b2ce4a39 | 89 | STATIC\r |
1e57a462 | 90 | VOID\r |
91 | SP805Start (\r | |
92 | VOID\r | |
93 | )\r | |
94 | {\r | |
95 | // Enable interrupts\r | |
96 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {\r | |
97 | MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);\r | |
98 | }\r | |
99 | }\r | |
100 | \r | |
101 | /**\r | |
102 | On exiting boot services we must make sure the SP805 Watchdog Timer\r | |
103 | is stopped.\r | |
104 | **/\r | |
105 | VOID\r | |
106 | EFIAPI\r | |
107 | ExitBootServicesEvent (\r | |
108 | IN EFI_EVENT Event,\r | |
109 | IN VOID *Context\r | |
110 | )\r | |
111 | {\r | |
112 | SP805Unlock();\r | |
113 | SP805Stop();\r | |
114 | SP805Lock();\r | |
115 | }\r | |
116 | \r | |
117 | /**\r | |
118 | This function registers the handler NotifyFunction so it is called every time\r | |
119 | the watchdog timer expires. It also passes the amount of time since the last\r | |
120 | handler call to the NotifyFunction.\r | |
121 | If NotifyFunction is not NULL and a handler is not already registered,\r | |
122 | then the new handler is registered and EFI_SUCCESS is returned.\r | |
123 | If NotifyFunction is NULL, and a handler is already registered,\r | |
124 | then that handler is unregistered.\r | |
125 | If an attempt is made to register a handler when a handler is already registered,\r | |
126 | then EFI_ALREADY_STARTED is returned.\r | |
127 | If an attempt is made to unregister a handler when a handler is not registered,\r | |
128 | then EFI_INVALID_PARAMETER is returned.\r | |
129 | \r | |
130 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
131 | @param NotifyFunction The function to call when a timer interrupt fires. This\r | |
132 | function executes at TPL_HIGH_LEVEL. The DXE Core will\r | |
133 | register a handler for the timer interrupt, so it can know\r | |
134 | how much time has passed. This information is used to\r | |
135 | signal timer based events. NULL will unregister the handler.\r | |
136 | \r | |
137 | @retval EFI_SUCCESS The watchdog timer handler was registered.\r | |
138 | @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already\r | |
139 | registered.\r | |
140 | @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not\r | |
141 | previously registered.\r | |
142 | \r | |
143 | **/\r | |
144 | EFI_STATUS\r | |
145 | EFIAPI\r | |
146 | SP805RegisterHandler (\r | |
147 | IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r | |
148 | IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction\r | |
149 | )\r | |
150 | {\r | |
151 | // ERROR: This function is not supported.\r | |
152 | // The hardware watchdog will reset the board\r | |
153 | return EFI_INVALID_PARAMETER;\r | |
154 | }\r | |
155 | \r | |
156 | /**\r | |
157 | \r | |
158 | This function adjusts the period of timer interrupts to the value specified\r | |
159 | by TimerPeriod. If the timer period is updated, then the selected timer\r | |
160 | period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If\r | |
161 | the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.\r | |
162 | If an error occurs while attempting to update the timer period, then the\r | |
163 | timer hardware will be put back in its state prior to this call, and\r | |
164 | EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt\r | |
165 | is disabled. This is not the same as disabling the CPU's interrupts.\r | |
166 | Instead, it must either turn off the timer hardware, or it must adjust the\r | |
167 | interrupt controller so that a CPU interrupt is not generated when the timer\r | |
168 | interrupt fires.\r | |
169 | \r | |
170 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
171 | @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If\r | |
172 | the timer hardware is not programmable, then EFI_UNSUPPORTED is\r | |
173 | returned. If the timer is programmable, then the timer period\r | |
174 | will be rounded up to the nearest timer period that is supported\r | |
175 | by the timer hardware. If TimerPeriod is set to 0, then the\r | |
176 | timer interrupts will be disabled.\r | |
177 | \r | |
178 | \r | |
179 | @retval EFI_SUCCESS The timer period was changed.\r | |
180 | @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.\r | |
181 | @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.\r | |
182 | \r | |
183 | **/\r | |
184 | EFI_STATUS\r | |
185 | EFIAPI\r | |
186 | SP805SetTimerPeriod (\r | |
187 | IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r | |
188 | IN UINT64 TimerPeriod // In 100ns units\r | |
189 | )\r | |
190 | {\r | |
191 | EFI_STATUS Status = EFI_SUCCESS;\r | |
192 | UINT64 Ticks64bit;\r | |
193 | \r | |
194 | SP805Unlock();\r | |
195 | \r | |
196 | if( TimerPeriod == 0 ) {\r | |
197 | // This is a watchdog stop request\r | |
198 | SP805Stop();\r | |
199 | goto EXIT;\r | |
200 | } else {\r | |
201 | // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds\r | |
202 | // The SP805 will count down to ZERO once, generate an interrupt and\r | |
203 | // then it will again reload the initial value and start again.\r | |
204 | // On the second time when it reaches ZERO, it will actually reset the board.\r | |
205 | // Therefore, we need to load half the required delay.\r | |
206 | //\r | |
207 | // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ;\r | |
208 | //\r | |
209 | // i.e.:\r | |
210 | //\r | |
211 | // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ;\r | |
212 | \r | |
213 | Ticks64bit = DivU64x32(MultU64x32(TimerPeriod, (UINTN)PcdGet32(PcdSP805WatchdogClockFrequencyInHz)), 20000000);\r | |
214 | \r | |
215 | // The registers in the SP805 are only 32 bits\r | |
216 | if(Ticks64bit > (UINT64)0xFFFFFFFF) {\r | |
217 | // We could load the watchdog with the maximum supported value but\r | |
218 | // if a smaller value was requested, this could have the watchdog\r | |
219 | // triggering before it was intended.\r | |
220 | // Better generate an error to let the caller know.\r | |
221 | Status = EFI_DEVICE_ERROR;\r | |
222 | goto EXIT;\r | |
223 | }\r | |
224 | \r | |
225 | // Update the watchdog with a 32-bit value.\r | |
226 | MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit);\r | |
227 | \r | |
228 | // Start the watchdog\r | |
229 | SP805Start();\r | |
230 | }\r | |
231 | \r | |
232 | EXIT:\r | |
233 | // Ensure the watchdog is locked before exiting.\r | |
234 | SP805Lock();\r | |
235 | return Status;\r | |
236 | }\r | |
237 | \r | |
238 | /**\r | |
239 | This function retrieves the period of timer interrupts in 100 ns units,\r | |
240 | returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod\r | |
241 | is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is\r | |
242 | returned, then the timer is currently disabled.\r | |
243 | \r | |
244 | @param This The EFI_TIMER_ARCH_PROTOCOL instance.\r | |
245 | @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If\r | |
246 | 0 is returned, then the timer is currently disabled.\r | |
247 | \r | |
248 | \r | |
249 | @retval EFI_SUCCESS The timer period was returned in TimerPeriod.\r | |
250 | @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.\r | |
251 | \r | |
252 | **/\r | |
253 | EFI_STATUS\r | |
254 | EFIAPI\r | |
255 | SP805GetTimerPeriod (\r | |
256 | IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,\r | |
257 | OUT UINT64 *TimerPeriod\r | |
258 | )\r | |
259 | {\r | |
260 | EFI_STATUS Status = EFI_SUCCESS;\r | |
261 | UINT64 ReturnValue;\r | |
262 | \r | |
263 | if (TimerPeriod == NULL) {\r | |
264 | return EFI_INVALID_PARAMETER;\r | |
265 | }\r | |
266 | \r | |
267 | // Check if the watchdog is stopped\r | |
268 | if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {\r | |
269 | // It is stopped, so return zero.\r | |
270 | ReturnValue = 0;\r | |
271 | } else {\r | |
272 | // Convert the Watchdog ticks into TimerPeriod\r | |
273 | // Ensure 64bit arithmetic throughout because the Watchdog ticks may already\r | |
274 | // be at the maximum 32 bit value and we still need to multiply that by 600.\r | |
275 | ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 );\r | |
276 | }\r | |
277 | \r | |
278 | *TimerPeriod = ReturnValue;\r | |
279 | \r | |
280 | return Status;\r | |
281 | }\r | |
282 | \r | |
283 | /**\r | |
284 | Interface structure for the Watchdog Architectural Protocol.\r | |
285 | \r | |
286 | @par Protocol Description:\r | |
287 | This protocol provides a service to set the amount of time to wait\r | |
288 | before firing the watchdog timer, and it also provides a service to\r | |
289 | register a handler that is invoked when the watchdog timer fires.\r | |
290 | \r | |
291 | @par When the watchdog timer fires, control will be passed to a handler\r | |
292 | if one has been registered. If no handler has been registered,\r | |
293 | or the registered handler returns, then the system will be\r | |
294 | reset by calling the Runtime Service ResetSystem().\r | |
295 | \r | |
296 | @param RegisterHandler\r | |
297 | Registers a handler that will be called each time the\r | |
298 | watchdogtimer interrupt fires. TimerPeriod defines the minimum\r | |
299 | time between timer interrupts, so TimerPeriod will also\r | |
300 | be the minimum time between calls to the registered\r | |
301 | handler.\r | |
302 | NOTE: If the watchdog resets the system in hardware, then\r | |
303 | this function will not have any chance of executing.\r | |
304 | \r | |
305 | @param SetTimerPeriod\r | |
306 | Sets the period of the timer interrupt in 100 nS units.\r | |
307 | This function is optional, and may return EFI_UNSUPPORTED.\r | |
308 | If this function is supported, then the timer period will\r | |
309 | be rounded up to the nearest supported timer period.\r | |
310 | \r | |
311 | @param GetTimerPeriod\r | |
312 | Retrieves the period of the timer interrupt in 100 nS units.\r | |
313 | \r | |
314 | **/\r | |
315 | EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = {\r | |
316 | (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) SP805RegisterHandler,\r | |
317 | (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) SP805SetTimerPeriod,\r | |
318 | (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) SP805GetTimerPeriod\r | |
319 | };\r | |
320 | \r | |
321 | /**\r | |
322 | Initialize the state information for the Watchdog Timer Architectural Protocol.\r | |
323 | \r | |
324 | @param ImageHandle of the loaded driver\r | |
325 | @param SystemTable Pointer to the System Table\r | |
326 | \r | |
327 | @retval EFI_SUCCESS Protocol registered\r | |
328 | @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure\r | |
329 | @retval EFI_DEVICE_ERROR Hardware problems\r | |
330 | \r | |
331 | **/\r | |
332 | EFI_STATUS\r | |
333 | EFIAPI\r | |
334 | SP805Initialize (\r | |
335 | IN EFI_HANDLE ImageHandle,\r | |
336 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
337 | )\r | |
338 | {\r | |
339 | EFI_STATUS Status;\r | |
340 | EFI_HANDLE Handle;\r | |
341 | \r | |
342 | // Unlock access to the SP805 registers\r | |
343 | SP805Unlock ();\r | |
344 | \r | |
345 | // Stop the watchdog from triggering unexpectedly\r | |
346 | SP805Stop ();\r | |
347 | \r | |
348 | // Set the watchdog to reset the board when triggered\r | |
349 | if ((MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) {\r | |
350 | MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN);\r | |
351 | }\r | |
352 | \r | |
353 | // Prohibit any rogue access to SP805 registers\r | |
354 | SP805Lock();\r | |
355 | \r | |
356 | //\r | |
357 | // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet.\r | |
358 | // This will avoid conflicts with the universal watchdog\r | |
359 | //\r | |
360 | ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);\r | |
361 | \r | |
362 | // Register for an ExitBootServicesEvent\r | |
363 | Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);\r | |
364 | if (EFI_ERROR(Status)) {\r | |
365 | Status = EFI_OUT_OF_RESOURCES;\r | |
366 | goto EXIT;\r | |
367 | }\r | |
368 | \r | |
369 | // Install the Timer Architectural Protocol onto a new handle\r | |
370 | Handle = NULL;\r | |
371 | Status = gBS->InstallMultipleProtocolInterfaces(\r | |
372 | &Handle,\r | |
373 | &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer,\r | |
374 | NULL\r | |
375 | );\r | |
376 | if (EFI_ERROR(Status)) {\r | |
377 | Status = EFI_OUT_OF_RESOURCES;\r | |
378 | goto EXIT;\r | |
379 | }\r | |
380 | \r | |
381 | EXIT:\r | |
382 | if(EFI_ERROR(Status)) {\r | |
383 | // The watchdog failed to initialize\r | |
384 | ASSERT(FALSE);\r | |
385 | }\r | |
386 | return Status;\r | |
387 | }\r |