[mirror_edk2.git] / ArmPlatformPkg / Include / Library / LcdPlatformLib.h

/** @file\r
\r
 Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
 http://opensource.org/licenses/bsd-license.php\r
\r
 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
 **/\r
\r
#ifndef LCD_PLATFORM_LIB_H_\r
#define LCD_PLATFORM_LIB_H_\r
\r
#include <Protocol/GraphicsOutput.h>\r
\r
#define LCD_VRAM_SIZE                     SIZE_8MB\r
\r
// Modes definitions\r
#define VGA                               0\r
#define SVGA                              1\r
#define XGA                               2\r
#define SXGA                              3\r
#define WSXGA                             4\r
#define UXGA                              5\r
#define HD                                6\r
\r
// VGA Mode: 640 x 480\r
#define VGA_H_RES_PIXELS                  640\r
#define VGA_V_RES_PIXELS                  480\r
#define VGA_OSC_FREQUENCY                 23750000  /* 0x016A6570 */\r
\r
#define VGA_H_SYNC                        ( 80 - 1)\r
#define VGA_H_FRONT_PORCH                 ( 16 - 1)\r
#define VGA_H_BACK_PORCH                  ( 64 - 1)\r
\r
#define VGA_V_SYNC                        (  4 - 1)\r
#define VGA_V_FRONT_PORCH                 (  3 - 1)\r
#define VGA_V_BACK_PORCH                  ( 13 - 1)\r
\r
// SVGA Mode: 800 x 600\r
#define SVGA_H_RES_PIXELS                 800\r
#define SVGA_V_RES_PIXELS                 600\r
#define SVGA_OSC_FREQUENCY                38250000  /* 0x0247A610 */\r
\r
#define SVGA_H_SYNC                       ( 80 - 1)\r
#define SVGA_H_FRONT_PORCH                ( 32 - 1)\r
#define SVGA_H_BACK_PORCH                 (112 - 1)\r
\r
#define SVGA_V_SYNC                       (  4 - 1)\r
#define SVGA_V_FRONT_PORCH                (  3 - 1)\r
#define SVGA_V_BACK_PORCH                 ( 17 - 1)\r
\r
// XGA Mode: 1024 x 768\r
#define XGA_H_RES_PIXELS                  1024\r
#define XGA_V_RES_PIXELS                  768\r
#define XGA_OSC_FREQUENCY                 63500000  /* 0x03C8EEE0 */\r
\r
#define XGA_H_SYNC                        (104 - 1)\r
#define XGA_H_FRONT_PORCH                 ( 48 - 1)\r
#define XGA_H_BACK_PORCH                  (152 - 1)\r
\r
#define XGA_V_SYNC                        (  4 - 1)\r
#define XGA_V_FRONT_PORCH                 (  3 - 1)\r
#define XGA_V_BACK_PORCH                  ( 23 - 1)\r
\r
// SXGA Mode: 1280 x 1024\r
#define SXGA_H_RES_PIXELS                 1280\r
#define SXGA_V_RES_PIXELS                 1024\r
#define SXGA_OSC_FREQUENCY                109000000  /* 0x067F3540 */\r
\r
#define SXGA_H_SYNC                       (136 - 1)\r
#define SXGA_H_FRONT_PORCH                ( 80 - 1)\r
#define SXGA_H_BACK_PORCH                 (216 - 1)\r
\r
#define SXGA_V_SYNC                       (  7 - 1)\r
#define SXGA_V_FRONT_PORCH                (  3 - 1)\r
#define SXGA_V_BACK_PORCH                 ( 29 - 1)\r
\r
// WSXGA+ Mode: 1680 x 1050\r
#define WSXGA_H_RES_PIXELS                1680\r
#define WSXGA_V_RES_PIXELS                1050\r
#define WSXGA_OSC_FREQUENCY               147000000  /* 0x08C30AC0 */\r
\r
#define WSXGA_H_SYNC                      (170 - 1)\r
#define WSXGA_H_FRONT_PORCH               (104 - 1)\r
#define WSXGA_H_BACK_PORCH                (274 - 1)\r
\r
#define WSXGA_V_SYNC                      (  5 - 1)\r
#define WSXGA_V_FRONT_PORCH               (  4 - 1)\r
#define WSXGA_V_BACK_PORCH                ( 41 - 1)\r
\r
// UXGA Mode: 1600 x 1200\r
#define UXGA_H_RES_PIXELS                 1600\r
#define UXGA_V_RES_PIXELS                 1200\r
#define UXGA_OSC_FREQUENCY                161000000  /* 0x0998AA40 */\r
\r
#define UXGA_H_SYNC                       (168 - 1)\r
#define UXGA_H_FRONT_PORCH                (112 - 1)\r
#define UXGA_H_BACK_PORCH                 (280 - 1)\r
\r
#define UXGA_V_SYNC                       (  4 - 1)\r
#define UXGA_V_FRONT_PORCH                (  3 - 1)\r
#define UXGA_V_BACK_PORCH                 ( 38 - 1)\r
\r
// HD Mode: 1920 x 1080\r
#define HD_H_RES_PIXELS                   1920\r
#define HD_V_RES_PIXELS                   1080\r
#define HD_OSC_FREQUENCY                  165000000  /* 0x09D5B340 */\r
\r
#define HD_H_SYNC                         ( 79 - 1)\r
#define HD_H_FRONT_PORCH                  (128 - 1)\r
#define HD_H_BACK_PORCH                   (328 - 1)\r
\r
#define HD_V_SYNC                         (  5 - 1)\r
#define HD_V_FRONT_PORCH                  (  3 - 1)\r
#define HD_V_BACK_PORCH                   ( 32 - 1)\r
\r
// Colour Masks\r
#define LCD_24BPP_RED_MASK              0x00FF0000\r
#define LCD_24BPP_GREEN_MASK            0x0000FF00\r
#define LCD_24BPP_BLUE_MASK             0x000000FF\r
#define LCD_24BPP_RESERVED_MASK         0xFF000000\r
\r
#define LCD_16BPP_555_RED_MASK          0x00007C00\r
#define LCD_16BPP_555_GREEN_MASK        0x000003E0\r
#define LCD_16BPP_555_BLUE_MASK         0x0000001F\r
#define LCD_16BPP_555_RESERVED_MASK     0x00000000\r
\r
#define LCD_16BPP_565_RED_MASK          0x0000F800\r
#define LCD_16BPP_565_GREEN_MASK        0x000007E0\r
#define LCD_16BPP_565_BLUE_MASK         0x0000001F\r
#define LCD_16BPP_565_RESERVED_MASK     0x00008000\r
\r
#define LCD_12BPP_444_RED_MASK          0x00000F00\r
#define LCD_12BPP_444_GREEN_MASK        0x000000F0\r
#define LCD_12BPP_444_BLUE_MASK         0x0000000F\r
#define LCD_12BPP_444_RESERVED_MASK     0x0000F000\r
\r
/** The enumeration maps the PL111 LcdBpp values used in the LCD Control\r
  Register\r
**/\r
typedef enum {\r
  LCD_BITS_PER_PIXEL_1 = 0,\r
  LCD_BITS_PER_PIXEL_2,\r
  LCD_BITS_PER_PIXEL_4,\r
  LCD_BITS_PER_PIXEL_8,\r
  LCD_BITS_PER_PIXEL_16_555,\r
  LCD_BITS_PER_PIXEL_24,\r
  LCD_BITS_PER_PIXEL_16_565,\r
  LCD_BITS_PER_PIXEL_12_444\r
} LCD_BPP;\r
\r
// Display timing settings.\r
typedef struct {\r
  UINT32                      Resolution;\r
  UINT32                      Sync;\r
  UINT32                      BackPorch;\r
  UINT32                      FrontPorch;\r
} SCAN_TIMINGS;\r
\r
/** Platform related initialization function.\r
\r
  @param[in] Handle              Handle to the LCD device instance.\r
\r
  @retval EFI_SUCCESS            Plaform library initialized successfully.\r
  @retval !(EFI_SUCCESS)         Other errors.\r
**/\r
EFI_STATUS\r
LcdPlatformInitializeDisplay (\r
  IN EFI_HANDLE   Handle\r
  );\r
\r
/** Allocate VRAM memory in DRAM for the framebuffer\r
  (unless it is reserved already).\r
\r
  The allocated address can be used to set the framebuffer.\r
\r
  @param[out] VramBaseAddress      A pointer to the framebuffer address.\r
  @param[out] VramSize             A pointer to the size of the frame\r
                                   buffer in bytes\r
\r
  @retval EFI_SUCCESS              Frame buffer memory allocated successfully.\r
  @retval !(EFI_SUCCESS)           Other errors.\r
**/\r
EFI_STATUS\r
LcdPlatformGetVram (\r
  OUT EFI_PHYSICAL_ADDRESS*                 VramBaseAddress,\r
  OUT UINTN*                                VramSize\r
  );\r
\r
/** Return total number of modes supported.\r
\r
  Note: Valid mode numbers are 0 to MaxMode - 1\r
  See Section 12.9 of the UEFI Specification 2.7\r
\r
  @retval UINT32             Mode Number.\r
**/\r
UINT32\r
LcdPlatformGetMaxMode (\r
  VOID\r
  );\r
\r
/** Set the requested display mode.\r
\r
  @param[in] ModeNumber            Mode Number.\r
\r
  @retval  EFI_SUCCESS             Mode set successfully.\r
  @retval  EFI_INVALID_PARAMETER   Requested mode not found.\r
  @retval  !(EFI_SUCCESS)          Other errors.\r
**/\r
EFI_STATUS\r
LcdPlatformSetMode (\r
  IN UINT32                                 ModeNumber\r
  );\r
\r
/** Return information for the requested mode number.\r
\r
  @param[in]  ModeNumber         Mode Number.\r
  @param[out] Info               Pointer for returned mode information\r
                                 (on success).\r
\r
  @retval EFI_SUCCESS             Mode information for the requested mode\r
                                  returned successfully.\r
  @retval EFI_INVALID_PARAMETER   Requested mode not found.\r
**/\r
EFI_STATUS\r
LcdPlatformQueryMode (\r
  IN  UINT32                                ModeNumber,\r
  OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  *Info\r
  );\r
\r
/** Return display timing information for the requested mode number.\r
\r
  @param[in]  ModeNumber          Mode Number.\r
\r
  @param[out] Horizontal          Pointer to horizontal timing parameters.\r
                                  (Resolution, Sync, Back porch, Front porch)\r
  @param[out] Vertical            Pointer to vertical timing parameters.\r
                                  (Resolution, Sync, Back porch, Front porch)\r
\r
\r
  @retval EFI_SUCCESS             Display timing information for the requested\r
                                  mode returned successfully.\r
  @retval EFI_INVALID_PARAMETER   Requested mode not found.\r
**/\r
EFI_STATUS\r
LcdPlatformGetTimings (\r
  IN  UINT32                              ModeNumber,\r
  OUT SCAN_TIMINGS                        **Horizontal,\r
  OUT SCAN_TIMINGS                        **Vertical\r
  );\r
\r
/** Return bits per pixel information for a mode number.\r
\r
  @param[in]  ModeNumber          Mode Number.\r
\r
  @param[out] Bpp                 Pointer to value bits per pixel information.\r
\r
  @retval EFI_SUCCESS             Bit per pixel information for the requested\r
                                  mode returned successfully.\r
  @retval EFI_INVALID_PARAMETER   Requested mode not found.\r
**/\r
EFI_STATUS\r
LcdPlatformGetBpp (\r
  IN  UINT32                                ModeNumber,\r
  OUT LCD_BPP*                              Bpp\r
  );\r
\r
#endif /* LCD_PLATFORM_LIB_H_ */\r
Commit	Line	Data
7d0f2f23	1	/** @file\r
7d0f2f23	2	\r
b1b69d26	3	Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>\r
7d0f2f23	4	This program and the accompanying materials\r
	5	are licensed and made available under the terms and conditions of the BSD License\r
	6	which accompanies this distribution. The full text of the license may be found at\r
	7	http://opensource.org/licenses/bsd-license.php\r
	8	\r
	9	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	11	\r
	12	**/\r
	13	\r
b1b69d26 GP	14	#ifndef LCD_PLATFORM_LIB_H_\r
b1b69d26 GP	15	#define LCD_PLATFORM_LIB_H_\r
7d0f2f23	16	\r
	17	#include <Protocol/GraphicsOutput.h>\r
	18	\r
	19	#define LCD_VRAM_SIZE SIZE_8MB\r
	20	\r
7d0f2f23	21	// Modes definitions\r
7d0f2f23	22	#define VGA 0\r
	23	#define SVGA 1\r
	24	#define XGA 2\r
	25	#define SXGA 3\r
beeb44f4	26	#define WSXGA 4\r
	27	#define UXGA 5\r
	28	#define HD 6\r
7d0f2f23	29	\r
7d0f2f23	30	// VGA Mode: 640 x 480\r
7d0f2f23	31	#define VGA_H_RES_PIXELS 640\r
	32	#define VGA_V_RES_PIXELS 480\r
	33	#define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */\r
	34	\r
	35	#define VGA_H_SYNC ( 80 - 1)\r
	36	#define VGA_H_FRONT_PORCH ( 16 - 1)\r
	37	#define VGA_H_BACK_PORCH ( 64 - 1)\r
	38	\r
	39	#define VGA_V_SYNC ( 4 - 1)\r
	40	#define VGA_V_FRONT_PORCH ( 3 - 1)\r
	41	#define VGA_V_BACK_PORCH ( 13 - 1)\r
	42	\r
7d0f2f23	43	// SVGA Mode: 800 x 600\r
7d0f2f23	44	#define SVGA_H_RES_PIXELS 800\r
	45	#define SVGA_V_RES_PIXELS 600\r
	46	#define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */\r
	47	\r
	48	#define SVGA_H_SYNC ( 80 - 1)\r
	49	#define SVGA_H_FRONT_PORCH ( 32 - 1)\r
	50	#define SVGA_H_BACK_PORCH (112 - 1)\r
	51	\r
	52	#define SVGA_V_SYNC ( 4 - 1)\r
	53	#define SVGA_V_FRONT_PORCH ( 3 - 1)\r
	54	#define SVGA_V_BACK_PORCH ( 17 - 1)\r
	55	\r
7d0f2f23	56	// XGA Mode: 1024 x 768\r
7d0f2f23	57	#define XGA_H_RES_PIXELS 1024\r
	58	#define XGA_V_RES_PIXELS 768\r
	59	#define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */\r
	60	\r
	61	#define XGA_H_SYNC (104 - 1)\r
	62	#define XGA_H_FRONT_PORCH ( 48 - 1)\r
	63	#define XGA_H_BACK_PORCH (152 - 1)\r
	64	\r
	65	#define XGA_V_SYNC ( 4 - 1)\r
	66	#define XGA_V_FRONT_PORCH ( 3 - 1)\r
	67	#define XGA_V_BACK_PORCH ( 23 - 1)\r
	68	\r
7d0f2f23	69	// SXGA Mode: 1280 x 1024\r
7d0f2f23	70	#define SXGA_H_RES_PIXELS 1280\r
	71	#define SXGA_V_RES_PIXELS 1024\r
	72	#define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */\r
	73	\r
	74	#define SXGA_H_SYNC (136 - 1)\r
	75	#define SXGA_H_FRONT_PORCH ( 80 - 1)\r
	76	#define SXGA_H_BACK_PORCH (216 - 1)\r
	77	\r
	78	#define SXGA_V_SYNC ( 7 - 1)\r
	79	#define SXGA_V_FRONT_PORCH ( 3 - 1)\r
	80	#define SXGA_V_BACK_PORCH ( 29 - 1)\r
	81	\r
beeb44f4	82	// WSXGA+ Mode: 1680 x 1050\r
beeb44f4	83	#define WSXGA_H_RES_PIXELS 1680\r
	84	#define WSXGA_V_RES_PIXELS 1050\r
	85	#define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */\r
	86	\r
	87	#define WSXGA_H_SYNC (170 - 1)\r
	88	#define WSXGA_H_FRONT_PORCH (104 - 1)\r
	89	#define WSXGA_H_BACK_PORCH (274 - 1)\r
	90	\r
	91	#define WSXGA_V_SYNC ( 5 - 1)\r
	92	#define WSXGA_V_FRONT_PORCH ( 4 - 1)\r
	93	#define WSXGA_V_BACK_PORCH ( 41 - 1)\r
	94	\r
7d0f2f23	95	// UXGA Mode: 1600 x 1200\r
7d0f2f23	96	#define UXGA_H_RES_PIXELS 1600\r
	97	#define UXGA_V_RES_PIXELS 1200\r
	98	#define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */\r
	99	\r
	100	#define UXGA_H_SYNC (168 - 1)\r
	101	#define UXGA_H_FRONT_PORCH (112 - 1)\r
	102	#define UXGA_H_BACK_PORCH (280 - 1)\r
	103	\r
	104	#define UXGA_V_SYNC ( 4 - 1)\r
	105	#define UXGA_V_FRONT_PORCH ( 3 - 1)\r
	106	#define UXGA_V_BACK_PORCH ( 38 - 1)\r
	107	\r
7d0f2f23	108	// HD Mode: 1920 x 1080\r
7d0f2f23	109	#define HD_H_RES_PIXELS 1920\r
7d0f2f23	110	#define HD_V_RES_PIXELS 1080\r
deb8a061	111	#define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */\r
7d0f2f23	112	\r
deb8a061	113	#define HD_H_SYNC ( 79 - 1)\r
7d0f2f23	114	#define HD_H_FRONT_PORCH (128 - 1)\r
	115	#define HD_H_BACK_PORCH (328 - 1)\r
	116	\r
	117	#define HD_V_SYNC ( 5 - 1)\r
	118	#define HD_V_FRONT_PORCH ( 3 - 1)\r
	119	#define HD_V_BACK_PORCH ( 32 - 1)\r
	120	\r
7d0f2f23	121	// Colour Masks\r
7d0f2f23	122	#define LCD_24BPP_RED_MASK 0x00FF0000\r
	123	#define LCD_24BPP_GREEN_MASK 0x0000FF00\r
	124	#define LCD_24BPP_BLUE_MASK 0x000000FF\r
	125	#define LCD_24BPP_RESERVED_MASK 0xFF000000\r
	126	\r
	127	#define LCD_16BPP_555_RED_MASK 0x00007C00\r
	128	#define LCD_16BPP_555_GREEN_MASK 0x000003E0\r
	129	#define LCD_16BPP_555_BLUE_MASK 0x0000001F\r
	130	#define LCD_16BPP_555_RESERVED_MASK 0x00000000\r
	131	\r
	132	#define LCD_16BPP_565_RED_MASK 0x0000F800\r
	133	#define LCD_16BPP_565_GREEN_MASK 0x000007E0\r
	134	#define LCD_16BPP_565_BLUE_MASK 0x0000001F\r
	135	#define LCD_16BPP_565_RESERVED_MASK 0x00008000\r
	136	\r
	137	#define LCD_12BPP_444_RED_MASK 0x00000F00\r
	138	#define LCD_12BPP_444_GREEN_MASK 0x000000F0\r
	139	#define LCD_12BPP_444_BLUE_MASK 0x0000000F\r
	140	#define LCD_12BPP_444_RESERVED_MASK 0x0000F000\r
	141	\r
4257dfaa	142	/** The enumeration maps the PL111 LcdBpp values used in the LCD Control\r
b1b69d26 GP	143	Register\r
b1b69d26 GP	144	**/\r
7d0f2f23	145	typedef enum {\r
	146	LCD_BITS_PER_PIXEL_1 = 0,\r
	147	LCD_BITS_PER_PIXEL_2,\r
	148	LCD_BITS_PER_PIXEL_4,\r
	149	LCD_BITS_PER_PIXEL_8,\r
	150	LCD_BITS_PER_PIXEL_16_555,\r
	151	LCD_BITS_PER_PIXEL_24,\r
	152	LCD_BITS_PER_PIXEL_16_565,\r
	153	LCD_BITS_PER_PIXEL_12_444\r
	154	} LCD_BPP;\r
	155	\r
262c8846 GP	156	// Display timing settings.\r
	157	typedef struct {\r
	158	UINT32 Resolution;\r
	159	UINT32 Sync;\r
	160	UINT32 BackPorch;\r
	161	UINT32 FrontPorch;\r
	162	} SCAN_TIMINGS;\r
	163	\r
4257dfaa GP	164	/** Platform related initialization function.\r
	165	\r
	166	@param[in] Handle Handle to the LCD device instance.\r
	167	\r
	168	@retval EFI_SUCCESS Plaform library initialized successfully.\r
	169	@retval !(EFI_SUCCESS) Other errors.\r
	170	**/\r
7d0f2f23	171	EFI_STATUS\r
7d0f2f23	172	LcdPlatformInitializeDisplay (\r
6d8d7363	173	IN EFI_HANDLE Handle\r
7d0f2f23	174	);\r
7d0f2f23	175	\r
4257dfaa GP	176	/** Allocate VRAM memory in DRAM for the framebuffer\r
	177	(unless it is reserved already).\r
	178	\r
	179	The allocated address can be used to set the framebuffer.\r
	180	\r
	181	@param[out] VramBaseAddress A pointer to the framebuffer address.\r
	182	@param[out] VramSize A pointer to the size of the frame\r
	183	buffer in bytes\r
	184	\r
	185	@retval EFI_SUCCESS Frame buffer memory allocated successfully.\r
	186	@retval !(EFI_SUCCESS) Other errors.\r
	187	**/\r
7d0f2f23	188	EFI_STATUS\r
	189	LcdPlatformGetVram (\r
	190	OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,\r
	191	OUT UINTN* VramSize\r
	192	);\r
	193	\r
4257dfaa GP	194	/** Return total number of modes supported.\r
	195	\r
	196	Note: Valid mode numbers are 0 to MaxMode - 1\r
	197	See Section 12.9 of the UEFI Specification 2.7\r
	198	\r
	199	@retval UINT32 Mode Number.\r
	200	**/\r
7d0f2f23	201	UINT32\r
	202	LcdPlatformGetMaxMode (\r
	203	VOID\r
	204	);\r
	205	\r
4257dfaa GP	206	/** Set the requested display mode.\r
	207	\r
	208	@param[in] ModeNumber Mode Number.\r
	209	\r
	210	@retval EFI_SUCCESS Mode set successfully.\r
	211	@retval EFI_INVALID_PARAMETER Requested mode not found.\r
	212	@retval !(EFI_SUCCESS) Other errors.\r
	213	**/\r
7d0f2f23	214	EFI_STATUS\r
	215	LcdPlatformSetMode (\r
	216	IN UINT32 ModeNumber\r
	217	);\r
	218	\r
4257dfaa GP	219	/** Return information for the requested mode number.\r
	220	\r
	221	@param[in] ModeNumber Mode Number.\r
	222	@param[out] Info Pointer for returned mode information\r
	223	(on success).\r
	224	\r
	225	@retval EFI_SUCCESS Mode information for the requested mode\r
	226	returned successfully.\r
	227	@retval EFI_INVALID_PARAMETER Requested mode not found.\r
	228	**/\r
7d0f2f23	229	EFI_STATUS\r
	230	LcdPlatformQueryMode (\r
	231	IN UINT32 ModeNumber,\r
	232	OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info\r
	233	);\r
	234	\r
4257dfaa GP	235	/** Return display timing information for the requested mode number.\r
	236	\r
	237	@param[in] ModeNumber Mode Number.\r
	238	\r
262c8846 GP	239	@param[out] Horizontal Pointer to horizontal timing parameters.\r
	240	(Resolution, Sync, Back porch, Front porch)\r
	241	@param[out] Vertical Pointer to vertical timing parameters.\r
	242	(Resolution, Sync, Back porch, Front porch)\r
	243	\r
4257dfaa GP	244	\r
	245	@retval EFI_SUCCESS Display timing information for the requested\r
	246	mode returned successfully.\r
	247	@retval EFI_INVALID_PARAMETER Requested mode not found.\r
	248	**/\r
7d0f2f23	249	EFI_STATUS\r
	250	LcdPlatformGetTimings (\r
	251	IN UINT32 ModeNumber,\r
262c8846 GP	252	OUT SCAN_TIMINGS **Horizontal,\r
262c8846 GP	253	OUT SCAN_TIMINGS **Vertical\r
7d0f2f23	254	);\r
7d0f2f23	255	\r
4257dfaa GP	256	/** Return bits per pixel information for a mode number.\r
	257	\r
	258	@param[in] ModeNumber Mode Number.\r
	259	\r
	260	@param[out] Bpp Pointer to value bits per pixel information.\r
	261	\r
	262	@retval EFI_SUCCESS Bit per pixel information for the requested\r
	263	mode returned successfully.\r
	264	@retval EFI_INVALID_PARAMETER Requested mode not found.\r
	265	**/\r
7d0f2f23	266	EFI_STATUS\r
	267	LcdPlatformGetBpp (\r
	268	IN UINT32 ModeNumber,\r
	269	OUT LCD_BPP* Bpp\r
	270	);\r
	271	\r
b1b69d26	272	#endif /* LCD_PLATFORM_LIB_H_ */\r