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1e57a462 1/** @file\r
2 Serial I/O Port library functions with no library constructor/destructor\r
3\r
4 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
9f08a052 5 Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.<BR>\r
921e987b 6 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
3402aac7 7\r
1e57a462 8 This program and the accompanying materials\r
9 are licensed and made available under the terms and conditions of the BSD License\r
10 which accompanies this distribution. The full text of the license may be found at\r
11 http://opensource.org/licenses/bsd-license.php\r
12\r
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
15\r
16**/\r
17\r
18#include <Base.h>\r
19\r
20#include <Library/IoLib.h>\r
21#include <Library/PcdLib.h>\r
22#include <Library/SerialPortLib.h>\r
1e57a462 23\r
24#include <Drivers/PL011Uart.h>\r
25\r
2d52a3a2 26/** Initialise the serial device hardware with default settings.\r
1e57a462 27\r
2d52a3a2
A
28 @retval RETURN_SUCCESS The serial device was initialised.\r
29 @retval RETURN_INVALID_PARAMETER One or more of the default settings\r
30 has an unsupported value.\r
31 **/\r
1e57a462 32RETURN_STATUS\r
33EFIAPI\r
34SerialPortInitialize (\r
35 VOID\r
36 )\r
37{\r
15e277d5 38 UINT64 BaudRate;\r
39 UINT32 ReceiveFifoDepth;\r
40 EFI_PARITY_TYPE Parity;\r
41 UINT8 DataBits;\r
42 EFI_STOP_BITS_TYPE StopBits;\r
43\r
aadc64e6 44 BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate);\r
9f08a052 45 ReceiveFifoDepth = 0; // Use default FIFO depth\r
aadc64e6
EL
46 Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);\r
47 DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);\r
48 StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);\r
15e277d5 49\r
1e57a462 50 return PL011UartInitializePort (\r
f6300528
EL
51 (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),\r
52 FixedPcdGet32 (PL011UartClkInHz),\r
53 &BaudRate,\r
54 &ReceiveFifoDepth,\r
55 &Parity,\r
56 &DataBits,\r
57 &StopBits\r
58 );\r
1e57a462 59}\r
60\r
61/**\r
62 Write data to serial device.\r
63\r
64 @param Buffer Point of data buffer which need to be written.\r
65 @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
66\r
67 @retval 0 Write data failed.\r
68 @retval !0 Actual number of bytes written to serial device.\r
69\r
70**/\r
71UINTN\r
72EFIAPI\r
73SerialPortWrite (\r
74 IN UINT8 *Buffer,\r
75 IN UINTN NumberOfBytes\r
76 )\r
77{\r
aadc64e6 78 return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
1e57a462 79}\r
80\r
81/**\r
82 Read data from serial device and save the data in buffer.\r
83\r
84 @param Buffer Point of data buffer which need to be written.\r
85 @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
86\r
87 @retval 0 Read data failed.\r
88 @retval !0 Actual number of bytes read from serial device.\r
89\r
90**/\r
91UINTN\r
92EFIAPI\r
93SerialPortRead (\r
94 OUT UINT8 *Buffer,\r
95 IN UINTN NumberOfBytes\r
96)\r
97{\r
aadc64e6 98 return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
1e57a462 99}\r
100\r
101/**\r
102 Check to see if any data is available to be read from the debug device.\r
103\r
2d52a3a2
A
104 @retval TRUE At least one byte of data is available to be read\r
105 @retval FALSE No data is available to be read\r
1e57a462 106\r
107**/\r
108BOOLEAN\r
109EFIAPI\r
110SerialPortPoll (\r
111 VOID\r
112 )\r
113{\r
aadc64e6 114 return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase));\r
1e57a462 115}\r
921e987b
SZ
116/**\r
117 Set new attributes to PL011.\r
118\r
9f08a052
EL
119 @param BaudRate The baud rate of the serial device. If the\r
120 baud rate is not supported, the speed will\r
121 be reduced down to the nearest supported one\r
122 and the variable's value will be updated\r
123 accordingly.\r
124 @param ReceiveFifoDepth The number of characters the device will\r
125 buffer on input. If the specified value is\r
126 not supported, the variable's value will\r
127 be reduced down to the nearest supported one.\r
128 @param Timeout If applicable, the number of microseconds the\r
129 device will wait before timing out a Read or\r
130 a Write operation.\r
131 @param Parity If applicable, this is the EFI_PARITY_TYPE\r
132 that is computed or checked as each character\r
133 is transmitted or received. If the device\r
134 does not support parity, the value is the\r
135 default parity value.\r
921e987b 136 @param DataBits The number of data bits in each character\r
9f08a052
EL
137 @param StopBits If applicable, the EFI_STOP_BITS_TYPE number\r
138 of stop bits per character. If the device\r
139 does not support stop bits, the value is the\r
140 default stop bit value.\r
921e987b 141\r
9f08a052
EL
142 @retval EFI_SUCCESS All attributes were set correctly.\r
143 @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported\r
144 value.\r
921e987b
SZ
145\r
146**/\r
147RETURN_STATUS\r
148EFIAPI\r
149SerialPortSetAttributes (\r
150 IN OUT UINT64 *BaudRate,\r
151 IN OUT UINT32 *ReceiveFifoDepth,\r
152 IN OUT UINT32 *Timeout,\r
153 IN OUT EFI_PARITY_TYPE *Parity,\r
154 IN OUT UINT8 *DataBits,\r
155 IN OUT EFI_STOP_BITS_TYPE *StopBits\r
156 )\r
157{\r
158 return PL011UartInitializePort (\r
f6300528
EL
159 (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),\r
160 FixedPcdGet32 (PL011UartClkInHz),\r
161 BaudRate,\r
162 ReceiveFifoDepth,\r
163 Parity,\r
164 DataBits,\r
165 StopBits\r
166 );\r
921e987b
SZ
167}\r
168\r
169/**\r
170\r
171 Assert or deassert the control signals on a serial port.\r
172 The following control signals are set according their bit settings :\r
173 . Request to Send\r
174 . Data Terminal Ready\r
175\r
176 @param[in] Control The following bits are taken into account :\r
177 . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the\r
178 "Request To Send" control signal if this bit is\r
179 equal to one/zero.\r
180 . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert\r
181 the "Data Terminal Ready" control signal if this\r
182 bit is equal to one/zero.\r
183 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable\r
184 the hardware loopback if this bit is equal to\r
185 one/zero.\r
186 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.\r
187 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/\r
188 disable the hardware flow control based on CTS (Clear\r
189 To Send) and RTS (Ready To Send) control signals.\r
190\r
9f08a052
EL
191 @retval RETURN_SUCCESS The new control bits were set on the device.\r
192 @retval RETURN_UNSUPPORTED The device does not support this operation.\r
921e987b
SZ
193\r
194**/\r
195RETURN_STATUS\r
196EFIAPI\r
197SerialPortSetControl (\r
198 IN UINT32 Control\r
199 )\r
200{\r
aadc64e6 201 return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);\r
921e987b
SZ
202}\r
203\r
204/**\r
1e57a462 205\r
921e987b
SZ
206 Retrieve the status of the control bits on a serial device.\r
207\r
208 @param[out] Control Status of the control bits on a serial device :\r
209\r
9f08a052
EL
210 . EFI_SERIAL_DATA_CLEAR_TO_SEND,\r
211 EFI_SERIAL_DATA_SET_READY,\r
212 EFI_SERIAL_RING_INDICATE,\r
213 EFI_SERIAL_CARRIER_DETECT,\r
214 EFI_SERIAL_REQUEST_TO_SEND,\r
215 EFI_SERIAL_DATA_TERMINAL_READY\r
216 are all related to the DTE (Data Terminal Equipment)\r
217 and DCE (Data Communication Equipment) modes of\r
218 operation of the serial device.\r
219 . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the\r
220 receive buffer is empty, 0 otherwise.\r
221 . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the\r
222 transmit buffer is empty, 0 otherwise.\r
223 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if\r
224 the hardware loopback is enabled (the output feeds\r
225 the receive buffer), 0 otherwise.\r
226 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one\r
227 if a loopback is accomplished by software, else 0.\r
228 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to\r
229 one if the hardware flow control based on CTS (Clear\r
230 To Send) and RTS (Ready To Send) control signals is\r
231 enabled, 0 otherwise.\r
232\r
233 @retval RETURN_SUCCESS The control bits were read from the device.\r
921e987b
SZ
234\r
235**/\r
236RETURN_STATUS\r
237EFIAPI\r
238SerialPortGetControl (\r
239 OUT UINT32 *Control\r
240 )\r
241{\r
aadc64e6 242 return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);\r
921e987b 243}\r