ArmPlatformPkg: Tidy Lcd code: Coding standard

[mirror_edk2.git] / ArmPlatformPkg / Library / PL111Lcd / PL111Lcd.c

/** @file\r
\r
  Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>\r
\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
#include <Library/DebugLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/LcdHwLib.h>\r
#include <Library/LcdPlatformLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
\r
#include "PL111Lcd.h"\r
\r
/** This file contains all the bits of the PL111 that are\r
  platform independent.\r
\r
**/\r
EFI_STATUS\r
LcdIdentify (\r
  VOID\r
  )\r
{\r
  DEBUG ((EFI_D_WARN, "Probing ID registers at 0x%lx for a PL111\n",\r
    PL111_REG_CLCD_PERIPH_ID_0));\r
\r
  // Check if this is a PL111\r
  if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 &&\r
      MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 &&\r
     (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 &&\r
      MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 &&\r
      MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 &&\r
      MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 &&\r
      MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 &&\r
      MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) {\r
    return EFI_SUCCESS;\r
  }\r
  return EFI_NOT_FOUND;\r
}\r
\r
EFI_STATUS\r
LcdInitialize (\r
  IN EFI_PHYSICAL_ADDRESS   VramBaseAddress\r
  )\r
{\r
  // Define start of the VRAM. This never changes for any graphics mode\r
  MmioWrite32 (PL111_REG_LCD_UP_BASE, (UINT32)VramBaseAddress);\r
  MmioWrite32 (PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer\r
\r
  // Disable all interrupts from the PL111\r
  MmioWrite32 (PL111_REG_LCD_IMSC, 0);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
LcdSetMode (\r
  IN UINT32  ModeNumber\r
  )\r
{\r
  EFI_STATUS        Status;\r
  UINT32            HRes;\r
  UINT32            HSync;\r
  UINT32            HBackPorch;\r
  UINT32            HFrontPorch;\r
  UINT32            VRes;\r
  UINT32            VSync;\r
  UINT32            VBackPorch;\r
  UINT32            VFrontPorch;\r
  UINT32            LcdControl;\r
  LCD_BPP           LcdBpp;\r
\r
  // Set the video mode timings and other relevant information\r
  Status = LcdPlatformGetTimings (\r
             ModeNumber,\r
             &HRes,\r
             &HSync,\r
             &HBackPorch,\r
             &HFrontPorch,\r
             &VRes,\r
             &VSync,\r
             &VBackPorch,\r
             &VFrontPorch\r
             );\r
  ASSERT_EFI_ERROR (Status);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  Status = LcdPlatformGetBpp (ModeNumber, &LcdBpp);\r
  ASSERT_EFI_ERROR (Status);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  // Disable the CLCD_LcdEn bit\r
  LcdControl = MmioRead32 (PL111_REG_LCD_CONTROL);\r
  MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl & ~1);\r
\r
  // Set Timings\r
  MmioWrite32 (\r
    PL111_REG_LCD_TIMING_0,\r
    HOR_AXIS_PANEL (HBackPorch, HFrontPorch, HSync, HRes)\r
    );\r
\r
  MmioWrite32 (\r
    PL111_REG_LCD_TIMING_1,\r
    VER_AXIS_PANEL (VBackPorch, VFrontPorch, VSync, VRes)\r
    );\r
\r
  MmioWrite32 (PL111_REG_LCD_TIMING_2, CLK_SIG_POLARITY (HRes));\r
  MmioWrite32 (PL111_REG_LCD_TIMING_3, 0);\r
\r
  // PL111_REG_LCD_CONTROL\r
  LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP (LcdBpp) |\r
               PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;\r
  MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);\r
\r
  // Turn on power to the LCD Panel\r
  LcdControl |= PL111_CTRL_LCD_PWR;\r
  MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
VOID\r
LcdShutdown (\r
  VOID\r
  )\r
{\r
  // Disable the controller\r
  MmioAnd32 (PL111_REG_LCD_CONTROL, ~PL111_CTRL_LCD_EN);\r
}\r