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ArmPlatformPkg/PrePeiCore: switch to ASM_FUNC() asm macro
[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / Arm / PrePeiCoreEntryPoint.S
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11c20f4e 1//\r
bebda7ce 2// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
11c20f4e 3//\r
3402aac7
RC
4// This program and the accompanying materials\r
5// are licensed and made available under the terms and conditions of the BSD License\r
6// which accompanies this distribution. The full text of the license may be found at\r
7// http://opensource.org/licenses/bsd-license.php\r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11c20f4e 11//\r
12//\r
13\r
14#include <AsmMacroIoLib.h>\r
11c20f4e 15\r
13dc7fa5 16ASM_FUNC(_ModuleEntryPoint)\r
b5a57223 17 // Do early platform specific actions\r
18 bl ASM_PFX(ArmPlatformPeiBootAction)\r
19\r
2dbcb8f0 20 // Identify CPU ID\r
0787bc61 21 bl ASM_PFX(ArmReadMpidr)\r
bebda7ce 22 // Keep a copy of the MpId register value\r
23 mov r5, r0\r
24\r
25 // Is it the Primary Core ?\r
26 bl ASM_PFX(ArmPlatformIsPrimaryCore)\r
27\r
1377db63 28 // Get the top of the primary stacks (and the base of the secondary stacks)\r
13dc7fa5 29 MOV32 (r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))\r
2dbcb8f0 30\r
bebda7ce 31 // r0 is equal to 1 if I am the primary core\r
32 cmp r0, #1\r
2dbcb8f0 33 beq _SetupPrimaryCoreStack\r
34\r
35_SetupSecondaryCoreStack:\r
1377db63 36 // r1 contains the base of the secondary stacks\r
2dbcb8f0 37\r
2d45f194 38 // Get the Core Position\r
39 mov r6, r1 // Save base of the secondary stacks\r
40 mov r0, r5\r
41 bl ASM_PFX(ArmPlatformGetCorePosition)\r
2dbcb8f0 42 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
1377db63 43 add r0, r0, #1\r
2dbcb8f0 44\r
2dbcb8f0 45 // StackOffset = CorePos * StackSize\r
13dc7fa5 46 MOV32 (r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))\r
1377db63 47 mul r0, r0, r2\r
2dbcb8f0 48 // SP = StackBase + StackOffset\r
2d45f194 49 add sp, r6, r0\r
11c20f4e 50\r
51_PrepareArguments:\r
2dbcb8f0 52 // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
13dc7fa5
AB
53 MOV32 (r2, FixedPcdGet32(PcdFvBaseAddress))\r
54 ldr r1, [r2, #4]\r
11c20f4e 55\r
1377db63 56 // Move sec startup address into a data register\r
57 // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
13dc7fa5 58 ldr r3, =ASM_PFX(CEntryPoint)\r
3402aac7 59\r
1377db63 60 // Jump to PrePeiCore C code\r
2dbcb8f0 61 // r0 = mp_id\r
62 // r1 = pei_core_address\r
1377db63 63 mov r0, r5\r
64 blx r3\r
65\r
66_SetupPrimaryCoreStack:\r
3707dee3 67 mov sp, r1\r
1377db63 68 b _PrepareArguments\r
2dbcb8f0 69\r
70_NeverReturn:\r
71 b _NeverReturn\r