[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / PrePeiCore.h

/** @file\r
*  Main file supporting the transition to PEI Core in Normal World for Versatile Express\r
*\r
*  Copyright (c) 2011, ARM Limited. All rights reserved.\r
*\r
*  This program and the accompanying materials\r
*  are licensed and made available under the terms and conditions of the BSD License\r
*  which accompanies this distribution.  The full text of the license may be found at\r
*  http://opensource.org/licenses/bsd-license.php\r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
#ifndef __PREPEICORE_H_\r
#define __PREPEICORE_H_\r
\r
#include <Library/DebugLib.h>\r
#include <Library/PcdLib.h>\r
\r
#include <PiPei.h>\r
#include <Ppi/TemporaryRamSupport.h>\r
\r
\r
EFI_STATUS\r
EFIAPI\r
SecTemporaryRamSupport (\r
  IN CONST EFI_PEI_SERVICES   **PeiServices,\r
  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,\r
  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,\r
  IN UINTN                    CopySize\r
  );\r
\r
VOID\r
SecSwitchStack (\r
  INTN    StackDelta\r
  );\r
\r
// Vector Table for Pei Phase\r
VOID  PeiVectorTable (VOID);\r
\r
VOID\r
EFIAPI\r
PrimaryMain (\r
  IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint\r
  );\r
\r
/*\r
 * This is the main function for secondary cores. They loop around until a non Null value is written to\r
 * SYS_FLAGS register.The SYS_FLAGS register is platform specific.\r
 * Note:The secondary cores, while executing secondary_main, assumes that:\r
 *      : SGI 0 is configured as Non-secure interrupt\r
 *      : Priority Mask is configured to allow SGI 0\r
 *      : Interrupt Distributor and CPU interfaces are enabled\r
 *\r
 */\r
VOID\r
EFIAPI\r
SecondaryMain (\r
  IN UINTN CoreId\r
  );\r
\r
#endif\r
Commit	Line	Data
f598bf12	1	/** @file\r
	2	* Main file supporting the transition to PEI Core in Normal World for Versatile Express\r
	3	*\r
	4	* Copyright (c) 2011, ARM Limited. All rights reserved.\r
	5	*\r
	6	* This program and the accompanying materials\r
	7	* are licensed and made available under the terms and conditions of the BSD License\r
	8	* which accompanies this distribution. The full text of the license may be found at\r
	9	* http://opensource.org/licenses/bsd-license.php\r
	10	*\r
	11	* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	12	* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	13	*\r
	14	**/\r
	15	#ifndef __PREPEICORE_H_\r
	16	#define __PREPEICORE_H_\r
	17	\r
5cc45b70	18	#include <Library/DebugLib.h>\r
	19	#include <Library/PcdLib.h>\r
	20	\r
f598bf12	21	#include <PiPei.h>\r
	22	#include <Ppi/TemporaryRamSupport.h>\r
	23	\r
	24	\r
	25	EFI_STATUS\r
	26	EFIAPI\r
	27	SecTemporaryRamSupport (\r
	28	IN CONST EFI_PEI_SERVICES **PeiServices,\r
	29	IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
	30	IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
	31	IN UINTN CopySize\r
	32	);\r
	33	\r
	34	VOID\r
	35	SecSwitchStack (\r
	36	INTN StackDelta\r
	37	);\r
	38	\r
	39	// Vector Table for Pei Phase\r
	40	VOID PeiVectorTable (VOID);\r
	41	\r
	42	VOID\r
	43	EFIAPI\r
	44	PrimaryMain (\r
	45	IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint\r
	46	);\r
	47	\r
	48	/*\r
	49	* This is the main function for secondary cores. They loop around until a non Null value is written to\r
	50	* SYS_FLAGS register.The SYS_FLAGS register is platform specific.\r
	51	* Note:The secondary cores, while executing secondary_main, assumes that:\r
	52	* : SGI 0 is configured as Non-secure interrupt\r
	53	* : Priority Mask is configured to allow SGI 0\r
	54	* : Interrupt Distributor and CPU interfaces are enabled\r
	55	*\r
	56	*/\r
	57	VOID\r
	58	EFIAPI\r
	59	SecondaryMain (\r
	60	IN UINTN CoreId\r
	61	);\r
	62	\r
	63	#endif\r