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cd872e40 | 1 | //\r |
c2d87a49 | 2 | // Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r |
cd872e40 | 3 | //\r |
4 | // This program and the accompanying materials\r | |
5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
6 | // which accompanies this distribution. The full text of the license may be found at\r | |
7 | // http://opensource.org/licenses/bsd-license.php\r | |
8 | //\r | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | //\r | |
12 | //\r | |
13 | \r | |
14 | #include <AsmMacroIoLib.h>\r | |
15 | #include <Base.h>\r | |
16 | #include <Library/PcdLib.h>\r | |
17 | #include <AutoGen.h>\r | |
18 | \r | |
063ad84e | 19 | #include <Chipset/ArmV7.h>\r |
20 | \r | |
cd872e40 | 21 | INCLUDE AsmMacroIoLib.inc\r |
3402aac7 | 22 | \r |
cd872e40 | 23 | IMPORT CEntryPoint\r |
bebda7ce | 24 | IMPORT ArmPlatformIsPrimaryCore\r |
0787bc61 | 25 | IMPORT ArmReadMpidr\r |
b5a57223 | 26 | IMPORT ArmPlatformPeiBootAction\r |
695df8ba | 27 | IMPORT ArmPlatformStackSet\r |
3402aac7 | 28 | \r |
cd872e40 | 29 | EXPORT _ModuleEntryPoint\r |
30 | \r | |
31 | PRESERVE8\r | |
32 | AREA PrePiCoreEntryPoint, CODE, READONLY\r | |
3402aac7 | 33 | \r |
cd872e40 | 34 | StartupAddr DCD CEntryPoint\r |
35 | \r | |
36 | _ModuleEntryPoint\r | |
b5a57223 | 37 | // Do early platform specific actions\r |
38 | bl ArmPlatformPeiBootAction\r | |
39 | \r | |
0787bc61 | 40 | // Get ID of this CPU in Multicore system\r |
41 | bl ArmReadMpidr\r | |
bebda7ce | 42 | // Keep a copy of the MpId register value\r |
c2d87a49 | 43 | mov r8, r0\r |
cd872e40 | 44 | \r |
d269095b | 45 | _SetSVCMode\r |
99565b88 | 46 | // Enter SVC mode, Disable FIQ and IRQ\r |
063ad84e | 47 | mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)\r |
d269095b | 48 | msr CPSR_c, r1\r |
49 | \r | |
2dbcb8f0 | 50 | // Check if we can install the stack at the top of the System Memory or if we need\r |
d269095b | 51 | // to install the stacks at the bottom of the Firmware Device (case the FD is located\r |
52 | // at the top of the DRAM)\r | |
53 | _SetupStackPosition\r | |
cd872e40 | 54 | // Compute Top of System Memory\r |
c357fd6a OM |
55 | LoadConstantToReg (FixedPcdGet64 (PcdSystemMemoryBase), r1)\r |
56 | LoadConstantToReg (FixedPcdGet64 (PcdSystemMemorySize), r2)\r | |
2569b068 | 57 | sub r2, r2, #1\r |
cd872e40 | 58 | add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r |
cd872e40 | 59 | \r |
d269095b | 60 | // Calculate Top of the Firmware Device\r |
f92b93c9 | 61 | LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r |
62 | LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r | |
2569b068 | 63 | sub r3, r3, #1\r |
7defe7b3 | 64 | add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r |
d269095b | 65 | \r |
66 | // UEFI Memory Size (stacks are allocated in this region)\r | |
67 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r | |
68 | \r | |
69 | //\r | |
70 | // Reserve the memory for the UEFI region (contain stacks on its top)\r | |
71 | //\r | |
72 | \r | |
73 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r | |
2dbcb8f0 | 74 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r |
75 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r | |
76 | cmp r0, r4\r | |
d269095b | 77 | bge _SetupStack\r |
78 | \r | |
79 | // Case the top of stacks is the FdBaseAddress\r | |
80 | mov r1, r2\r | |
cd872e40 | 81 | \r |
82 | _SetupStack\r | |
2dbcb8f0 | 83 | // r1 contains the top of the stack (and the UEFI Memory)\r |
d269095b | 84 | \r |
2569b068 | 85 | // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r |
86 | // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r | |
87 | // top of the memory space)\r | |
c2d87a49 | 88 | adds r9, r1, #1\r |
2569b068 | 89 | bcs _SetupOverflowStack\r |
90 | \r | |
91 | _SetupAlignedStack\r | |
c2d87a49 | 92 | mov r1, r9\r |
2569b068 | 93 | b _GetBaseUefiMemory\r |
94 | \r | |
95 | _SetupOverflowStack\r | |
96 | // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r | |
97 | // aligned (4KB)\r | |
c2d87a49 OM |
98 | LoadConstantToReg (EFI_PAGE_MASK, r9)\r |
99 | and r9, r9, r1\r | |
100 | sub r1, r1, r9\r | |
2569b068 | 101 | \r |
102 | _GetBaseUefiMemory\r | |
d269095b | 103 | // Calculate the Base of the UEFI Memory\r |
c2d87a49 | 104 | sub r9, r1, r4\r |
cd872e40 | 105 | \r |
2dbcb8f0 | 106 | _GetStackBase\r |
1377db63 | 107 | // r1 = The top of the Mpcore Stacks\r |
2dbcb8f0 | 108 | // Stack for the primary core = PrimaryCoreStack\r |
109 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
c2d87a49 | 110 | sub r10, r1, r2\r |
695df8ba | 111 | \r |
112 | // Stack for the secondary core = Number of Cores - 1\r | |
113 | LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r | |
114 | sub r0, r0, #1\r | |
115 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r | |
116 | mul r1, r1, r0\r | |
c2d87a49 | 117 | sub r10, r10, r1\r |
695df8ba | 118 | \r |
c2d87a49 OM |
119 | // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)\r |
120 | mov r0, r10\r | |
121 | mov r1, r8\r | |
695df8ba | 122 | //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r |
123 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
2dbcb8f0 | 124 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r |
17839a45 | 125 | bl ArmPlatformStackSet\r |
2dbcb8f0 | 126 | \r |
127 | // Is it the Primary Core ?\r | |
c2d87a49 | 128 | mov r0, r8\r |
bebda7ce | 129 | bl ArmPlatformIsPrimaryCore\r |
130 | cmp r0, #1\r | |
cd872e40 | 131 | bne _PrepareArguments\r |
132 | \r | |
17839a45 | 133 | _ReserveGlobalVariable\r |
134 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r | |
135 | // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r | |
136 | InitializePrimaryStack r0, r1\r | |
2dbcb8f0 | 137 | \r |
cd872e40 | 138 | _PrepareArguments\r |
c2d87a49 OM |
139 | mov r0, r8\r |
140 | mov r1, r9\r | |
141 | mov r2, r10\r | |
c524ffbb | 142 | mov r3, sp\r |
143 | \r | |
cd872e40 | 144 | // Move sec startup address into a data register\r |
145 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r | |
c524ffbb | 146 | ldr r4, StartupAddr\r |
cd872e40 | 147 | \r |
d269095b | 148 | // Jump to PrePiCore C code\r |
0787bc61 | 149 | // r0 = MpId\r |
cd872e40 | 150 | // r1 = UefiMemoryBase\r |
c524ffbb | 151 | // r2 = StacksBase\r |
152 | // r3 = GlobalVariableBase\r | |
153 | blx r4\r | |
cd872e40 | 154 | \r |
2dbcb8f0 | 155 | _NeverReturn\r |
156 | b _NeverReturn\r | |
157 | \r | |
cd872e40 | 158 | END\r |