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1#/** @file\r
2#\r
3# Copyright (c) 2014, Linaro Limited. All rights reserved.\r
4#\r
5# This program and the accompanying materials\r
6# are licensed and made available under the terms and conditions of the BSD License\r
7# which accompanies this distribution. The full text of the license may be found at\r
8# http://opensource.org/licenses/bsd-license.php\r
9#\r
10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12#\r
13#**/\r
14\r
15[Defines]\r
16 DEC_SPECIFICATION = 0x00010005\r
7fbd1eb2 17 PACKAGE_NAME = ArmVirtPkg\r
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18 PACKAGE_GUID = A0B31216-508E-4025-BEAB-56D836C66F0A\r
19 PACKAGE_VERSION = 0.1\r
20\r
21################################################################################\r
22#\r
23# Include Section - list of Include Paths that are provided by this package.\r
24# Comments are used for Keywords and Module Types.\r
25#\r
26# Supported Module Types:\r
27# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION\r
28#\r
29################################################################################\r
30[Includes.common]\r
31 Include # Root include for the package\r
32\r
33[Guids.common]\r
7fbd1eb2 34 gArmVirtTokenSpaceGuid = { 0x0B6F5CA7, 0x4F53, 0x445A, { 0xB7, 0x6E, 0x2E, 0x36, 0x5B, 0x80, 0x63, 0x66 } }\r
de5f5e93 35 gEarlyPL011BaseAddressGuid = { 0xB199DEA9, 0xFD5C, 0x4A84, { 0x80, 0x82, 0x2F, 0x41, 0x70, 0x78, 0x03, 0x05 } }\r
ad6f3daf 36\r
ada518b7 37[PcdsFixedAtBuild, PcdsPatchableInModule]\r
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38 #\r
39 # This is the physical address where the device tree is expected to be stored\r
40 # upon first entry into UEFI. This needs to be a FixedAtBuild PCD, so that we\r
41 # can do a first pass over the device tree in the SEC phase to discover the\r
42 # UART base address.\r
43 #\r
7fbd1eb2 44 gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x0|UINT64|0x00000001\r
ad6f3daf 45\r
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46 #\r
47 # Padding in bytes to add to the device tree allocation, so that the DTB can\r
48 # be modified in place (default: 256 bytes)\r
49 #\r
7fbd1eb2 50 gArmVirtTokenSpaceGuid.PcdDeviceTreeAllocationPadding|256|UINT32|0x00000002\r
616ea9da 51\r
9180ab73 52[PcdsDynamic, PcdsFixedAtBuild]\r
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53 #\r
54 # ARM PSCI function invocations can be done either through hypervisor\r
55 # calls (HVC) or secure monitor calls (SMC).\r
56 # PcdArmPsciMethod == 1 : use HVC\r
57 # PcdArmPsciMethod == 2 : use SMC\r
58 #\r
7fbd1eb2 59 gArmVirtTokenSpaceGuid.PcdArmPsciMethod|0|UINT32|0x00000003\r
ad652d46 60\r
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61 gArmVirtTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x00000004\r
62 gArmVirtTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x00000005\r
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63\r
64[PcdsFeatureFlag]\r
65 #\r
66 # "Map PCI MMIO as Cached"\r
67 #\r
68 # Due to the way Stage1 and Stage2 mappings are combined on Aarch64, and\r
69 # because KVM -- for the time being -- does not try to interfere with the\r
70 # Stage1 mappings, we must not set EFI_MEMORY_UC for emulated PCI MMIO\r
71 # regions.\r
72 #\r
73 # EFI_MEMORY_UC is mapped to Device-nGnRnE, and that Stage1 attribute would\r
74 # direct guest writes to host DRAM immediately, bypassing the cache\r
75 # regardless of Stage2 attributes. However, QEMU's reads of the same range\r
76 # can easily be served from the (stale) CPU cache.\r
77 #\r
78 # Setting this PCD to TRUE will use EFI_MEMORY_WB for mapping PCI MMIO\r
79 # regions, which ensures that guest writes to such regions go through the CPU\r
80 # cache. Strictly speaking this is wrong, but it is needed as a temporary\r
81 # workaround for emulated PCI devices. Setting the PCD to FALSE results in\r
82 # the theoretically correct EFI_MEMORY_UC mapping, and should be the long\r
83 # term choice, especially with assigned devices.\r
84 #\r
85 # The default is to turn off the kludge; DSC's can selectively enable it.\r
86 #\r
7fbd1eb2 87 gArmVirtTokenSpaceGuid.PcdKludgeMapPciMmioAsCached|FALSE|BOOLEAN|0x00000006\r