projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 2ef2b01e A |
1 | /** @file\r |
| 2 | \r | |
| 3 | Copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r | |
| 4 | \r | |
| 5 | All rights reserved. This program and the accompanying materials\r | |
| 6 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 7 | which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | http://opensource.org/licenses/bsd-license.php\r | |
| 9 | \r | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | \r | |
| 13 | **/\r | |
| 14 | \r | |
| 15 | #ifndef __OMAP3530UART_H__\r | |
| 16 | #define __OMAP3530UART_H__\r | |
| 17 | \r | |
| 18 | #define UART1_BASE (0x4806A000)\r | |
| 19 | #define UART2_BASE (0x4806C000)\r | |
| 20 | #define UART3_BASE (0x49020000)\r | |
| 21 | \r | |
| 22 | #define UART_DLL_REG (0x0000)\r | |
| 23 | #define UART_RBR_REG (0x0000)\r | |
| 24 | #define UART_THR_REG (0x0000)\r | |
| 25 | #define UART_DLH_REG (0x0004)\r | |
| 26 | #define UART_FCR_REG (0x0008)\r | |
| 27 | #define UART_LCR_REG (0x000C)\r | |
| 28 | #define UART_MCR_REG (0x0010)\r | |
| 29 | #define UART_LSR_REG (0x0014)\r | |
| 30 | #define UART_MDR1_REG (0x0020)\r | |
| 31 | \r | |
| 32 | #define UART_FCR_TX_FIFO_CLEAR (1UL << 3)\r | |
| 33 | #define UART_FCR_RX_FIFO_CLEAR (1UL << 3)\r | |
| 34 | #define UART_FCR_FIFO_ENABLE (1UL << 3)\r | |
| 35 | \r | |
| 36 | #define UART_LCR_DIV_EN_ENABLE (1UL << 7)\r | |
| 37 | #define UART_LCR_DIV_EN_DISABLE (0UL << 7)\r | |
| 38 | #define UART_LCR_CHAR_LENGTH_8 (3UL << 0)\r | |
| 39 | \r | |
| 40 | #define UART_MCR_RTS_FORCE_ACTIVE (1UL << 1)\r | |
| 41 | #define UART_MCR_DTR_FORCE_ACTIVE (1UL << 0)\r | |
| 42 | \r | |
| 43 | #define UART_LSR_TX_FIFO_E_MASK (1UL << 5)\r | |
| 44 | #define UART_LSR_TX_FIFO_E_NOT_EMPTY (0UL << 5)\r | |
| 45 | #define UART_LSR_TX_FIFO_E_EMPTY (1UL << 5)\r | |
| 46 | #define UART_LSR_RX_FIFO_E_MASK (1UL << 0)\r | |
| 47 | #define UART_LSR_RX_FIFO_E_NOT_EMPTY (1UL << 0)\r | |
| 48 | #define UART_LSR_RX_FIFO_E_EMPTY (0UL << 0)\r | |
| 49 | \r | |
| 50 | #define UART_MDR1_MODE_SELECT_DISABLE (7UL << 0)\r | |
| 51 | #define UART_MDR1_MODE_SELECT_UART_16X (0UL << 0)\r | |
| 52 | \r | |
| 53 | #endif // __OMAP3530UART_H__\r |