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1 | /** @file\r |
2 | \r |
3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
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4 | \r |
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5 | This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r |
8 | http://opensource.org/licenses/bsd-license.php\r |
9 | \r |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
12 | \r |
13 | **/\r |
14 | \r |
15 | #include <PiPei.h>\r |
16 | #include <Library/IoLib.h>\r |
17 | #include <Library/DebugLib.h>\r |
18 | #include <Omap3530/Omap3530.h>\r |
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19 | #include <BeagleBoard.h>\r |
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20 | \r |
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21 | #define NUM_PINS_SHARED 232\r |
22 | #define NUM_PINS_ABC 6\r |
23 | #define NUM_PINS_XM 12\r |
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24 | \r |
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25 | PAD_CONFIGURATION PadConfigurationTableShared[] = {\r |
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26 | //Pin, MuxMode, PullConfig, InputEnable\r |
27 | { SDRC_D0, MUXMODE0, PULL_DISABLED, INPUT },\r |
28 | { SDRC_D1, MUXMODE0, PULL_DISABLED, INPUT },\r |
29 | { SDRC_D2, MUXMODE0, PULL_DISABLED, INPUT },\r |
30 | { SDRC_D3, MUXMODE0, PULL_DISABLED, INPUT },\r |
31 | { SDRC_D4, MUXMODE0, PULL_DISABLED, INPUT },\r |
32 | { SDRC_D5, MUXMODE0, PULL_DISABLED, INPUT },\r |
33 | { SDRC_D6, MUXMODE0, PULL_DISABLED, INPUT },\r |
34 | { SDRC_D7, MUXMODE0, PULL_DISABLED, INPUT },\r |
35 | { SDRC_D8, MUXMODE0, PULL_DISABLED, INPUT },\r |
36 | { SDRC_D9, MUXMODE0, PULL_DISABLED, INPUT },\r |
37 | { SDRC_D10, MUXMODE0, PULL_DISABLED, INPUT },\r |
38 | { SDRC_D11, MUXMODE0, PULL_DISABLED, INPUT },\r |
39 | { SDRC_D12, MUXMODE0, PULL_DISABLED, INPUT },\r |
40 | { SDRC_D13, MUXMODE0, PULL_DISABLED, INPUT },\r |
41 | { SDRC_D14, MUXMODE0, PULL_DISABLED, INPUT },\r |
42 | { SDRC_D15, MUXMODE0, PULL_DISABLED, INPUT },\r |
43 | { SDRC_D16, MUXMODE0, PULL_DISABLED, INPUT },\r |
44 | { SDRC_D17, MUXMODE0, PULL_DISABLED, INPUT },\r |
45 | { SDRC_D18, MUXMODE0, PULL_DISABLED, INPUT },\r |
46 | { SDRC_D19, MUXMODE0, PULL_DISABLED, INPUT },\r |
47 | { SDRC_D20, MUXMODE0, PULL_DISABLED, INPUT },\r |
48 | { SDRC_D21, MUXMODE0, PULL_DISABLED, INPUT },\r |
49 | { SDRC_D22, MUXMODE0, PULL_DISABLED, INPUT },\r |
50 | { SDRC_D23, MUXMODE0, PULL_DISABLED, INPUT },\r |
51 | { SDRC_D24, MUXMODE0, PULL_DISABLED, INPUT },\r |
52 | { SDRC_D25, MUXMODE0, PULL_DISABLED, INPUT },\r |
53 | { SDRC_D26, MUXMODE0, PULL_DISABLED, INPUT },\r |
54 | { SDRC_D27, MUXMODE0, PULL_DISABLED, INPUT },\r |
55 | { SDRC_D28, MUXMODE0, PULL_DISABLED, INPUT },\r |
56 | { SDRC_D29, MUXMODE0, PULL_DISABLED, INPUT },\r |
57 | { SDRC_D30, MUXMODE0, PULL_DISABLED, INPUT },\r |
58 | { SDRC_D31, MUXMODE0, PULL_DISABLED, INPUT },\r |
59 | { SDRC_CLK, MUXMODE0, PULL_DISABLED, INPUT },\r |
60 | { SDRC_DQS0, MUXMODE0, PULL_DISABLED, INPUT },\r |
61 | { SDRC_CKE0, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
62 | { SDRC_CKE1, MUXMODE7, PULL_DISABLED, INPUT },\r |
63 | { SDRC_DQS1, MUXMODE0, PULL_DISABLED, INPUT },\r |
64 | { SDRC_DQS2, MUXMODE0, PULL_DISABLED, INPUT },\r |
65 | { SDRC_DQS3, MUXMODE0, PULL_DISABLED, INPUT },\r |
66 | { GPMC_A1, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
67 | { GPMC_A2, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
68 | { GPMC_A3, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
69 | { GPMC_A4, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
70 | { GPMC_A5, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
71 | { GPMC_A6, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
72 | { GPMC_A7, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
73 | { GPMC_A8, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
74 | { GPMC_A9, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
75 | { GPMC_A10, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
76 | { GPMC_D0, MUXMODE0, PULL_DISABLED, INPUT },\r |
77 | { GPMC_D1, MUXMODE0, PULL_DISABLED, INPUT },\r |
78 | { GPMC_D2, MUXMODE0, PULL_DISABLED, INPUT },\r |
79 | { GPMC_D3, MUXMODE0, PULL_DISABLED, INPUT },\r |
80 | { GPMC_D4, MUXMODE0, PULL_DISABLED, INPUT },\r |
81 | { GPMC_D5, MUXMODE0, PULL_DISABLED, INPUT },\r |
82 | { GPMC_D6, MUXMODE0, PULL_DISABLED, INPUT },\r |
83 | { GPMC_D7, MUXMODE0, PULL_DISABLED, INPUT },\r |
84 | { GPMC_D8, MUXMODE0, PULL_DISABLED, INPUT },\r |
85 | { GPMC_D9, MUXMODE0, PULL_DISABLED, INPUT },\r |
86 | { GPMC_D10, MUXMODE0, PULL_DISABLED, INPUT },\r |
87 | { GPMC_D11, MUXMODE0, PULL_DISABLED, INPUT },\r |
88 | { GPMC_D12, MUXMODE0, PULL_DISABLED, INPUT },\r |
89 | { GPMC_D13, MUXMODE0, PULL_DISABLED, INPUT },\r |
90 | { GPMC_D14, MUXMODE0, PULL_DISABLED, INPUT },\r |
91 | { GPMC_D15, MUXMODE0, PULL_DISABLED, INPUT },\r |
92 | { GPMC_NCS0, MUXMODE0, PULL_DISABLED, INPUT },\r |
93 | { GPMC_NCS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },\r |
94 | { GPMC_NCS2, MUXMODE0, PULL_UP_SELECTED, OUTPUT },\r |
95 | { GPMC_NCS3, MUXMODE0, PULL_UP_SELECTED, OUTPUT },\r |
96 | { GPMC_NCS4, MUXMODE0, PULL_UP_SELECTED, OUTPUT },\r |
97 | { GPMC_NCS5, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
98 | { GPMC_NCS6, MUXMODE1, PULL_DISABLED, INPUT },\r |
99 | { GPMC_NCS7, MUXMODE1, PULL_UP_SELECTED, INPUT },\r |
100 | { GPMC_CLK, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
101 | { GPMC_NADV_ALE, MUXMODE0, PULL_DISABLED, INPUT },\r |
102 | { GPMC_NOE, MUXMODE0, PULL_DISABLED, INPUT },\r |
103 | { GPMC_NWE, MUXMODE0, PULL_DISABLED, INPUT },\r |
104 | { GPMC_NBE0_CLE, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
105 | { GPMC_NBE1, MUXMODE0, PULL_DISABLED, INPUT },\r |
106 | { GPMC_NWP, MUXMODE0, PULL_DISABLED, INPUT },\r |
107 | { GPMC_WAIT0, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
108 | { GPMC_WAIT1, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
109 | { GPMC_WAIT2, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
110 | { GPMC_WAIT3, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
111 | { DSS_PCLK, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
112 | { DSS_HSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
113 | { DSS_PSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
114 | { DSS_ACBIAS, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
115 | { DSS_DATA0, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
116 | { DSS_DATA1, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
117 | { DSS_DATA2, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
118 | { DSS_DATA3, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
119 | { DSS_DATA4, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
120 | { DSS_DATA5, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
121 | { DSS_DATA6, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
122 | { DSS_DATA7, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
123 | { DSS_DATA8, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
124 | { DSS_DATA9, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
125 | { DSS_DATA10, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
126 | { DSS_DATA11, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
127 | { DSS_DATA12, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
128 | { DSS_DATA13, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
129 | { DSS_DATA14, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
130 | { DSS_DATA15, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
131 | { DSS_DATA16, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
132 | { DSS_DATA17, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
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133 | { CAM_HS, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
134 | { CAM_VS, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
135 | { CAM_XCLKA, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
136 | { CAM_PCLK, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
137 | { CAM_FLD, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
138 | { CAM_D0, MUXMODE0, PULL_DISABLED, INPUT },\r |
139 | { CAM_D1, MUXMODE0, PULL_DISABLED, INPUT },\r |
140 | { CAM_D2, MUXMODE0, PULL_DISABLED, INPUT },\r |
141 | { CAM_D3, MUXMODE0, PULL_DISABLED, INPUT },\r |
142 | { CAM_D4, MUXMODE0, PULL_DISABLED, INPUT },\r |
143 | { CAM_D5, MUXMODE0, PULL_DISABLED, INPUT },\r |
144 | { CAM_D6, MUXMODE0, PULL_DISABLED, INPUT },\r |
145 | { CAM_D7, MUXMODE0, PULL_DISABLED, INPUT },\r |
146 | { CAM_D8, MUXMODE0, PULL_DISABLED, INPUT },\r |
147 | { CAM_D9, MUXMODE0, PULL_DISABLED, INPUT },\r |
148 | { CAM_D10, MUXMODE0, PULL_DISABLED, INPUT },\r |
149 | { CAM_D11, MUXMODE0, PULL_DISABLED, INPUT },\r |
150 | { CAM_XCLKB, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
151 | { CAM_WEN, MUXMODE4, PULL_DISABLED, INPUT },\r |
152 | { CAM_STROBE, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
153 | { CSI2_DX0, MUXMODE0, PULL_DISABLED, INPUT },\r |
154 | { CSI2_DY0, MUXMODE0, PULL_DISABLED, INPUT },\r |
155 | { CSI2_DX1, MUXMODE0, PULL_DISABLED, INPUT },\r |
156 | { CSI2_DY1, MUXMODE0, PULL_DISABLED, INPUT },\r |
157 | { MCBSP2_FSX, MUXMODE0, PULL_DISABLED, INPUT },\r |
158 | { MCBSP2_CLKX, MUXMODE0, PULL_DISABLED, INPUT },\r |
159 | { MCBSP2_DR, MUXMODE0, PULL_DISABLED, INPUT },\r |
160 | { MCBSP2_DX, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
161 | { MMC1_CLK, MUXMODE0, PULL_UP_SELECTED, OUTPUT },\r |
162 | { MMC1_CMD, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
163 | { MMC1_DAT0, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
164 | { MMC1_DAT1, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
165 | { MMC1_DAT2, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
166 | { MMC1_DAT3, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
167 | { MMC1_DAT4, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
168 | { MMC1_DAT5, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
169 | { MMC1_DAT6, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
170 | { MMC1_DAT7, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
171 | { MMC2_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
172 | { MMC2_CMD, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
173 | { MMC2_DAT0, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
174 | { MMC2_DAT1, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
175 | { MMC2_DAT2, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
176 | { MMC2_DAT3, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
177 | { MMC2_DAT4, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
178 | { MMC2_DAT5, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
179 | { MMC2_DAT6, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
180 | { MMC2_DAT7, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
181 | { MCBSP3_DX, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
182 | { MCBSP3_DR, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
183 | { MCBSP3_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
184 | { MCBSP3_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
185 | { UART2_CTS, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
186 | { UART2_RTS, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
187 | { UART2_TX, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
188 | { UART2_RX, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
189 | { UART1_TX, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
190 | { UART1_RTS, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
191 | { UART1_CTS, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
192 | { UART1_RX, MUXMODE0, PULL_DISABLED, INPUT },\r |
193 | { MCBSP4_CLKX, MUXMODE1, PULL_DISABLED, INPUT },\r |
194 | { MCBSP4_DR, MUXMODE1, PULL_DISABLED, INPUT },\r |
195 | { MCBSP4_DX, MUXMODE1, PULL_DISABLED, INPUT },\r |
196 | { MCBSP4_FSX, MUXMODE1, PULL_DISABLED, INPUT },\r |
197 | { MCBSP1_CLKR, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
198 | { MCBSP1_FSR, MUXMODE4, PULL_UP_SELECTED, OUTPUT },\r |
199 | { MCBSP1_DX, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
200 | { MCBSP1_DR, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
201 | { MCBSP1_CLKS, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
202 | { MCBSP1_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
203 | { MCBSP1_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
204 | { UART3_CTS_RCTX,MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
205 | { UART3_RTS_SD, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
206 | { UART3_RX_IRRX, MUXMODE0, PULL_DISABLED, INPUT },\r |
207 | { UART3_TX_IRTX, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
208 | { HSUSB0_CLK, MUXMODE0, PULL_DISABLED, INPUT },\r |
209 | { HSUSB0_STP, MUXMODE0, PULL_UP_SELECTED, OUTPUT },\r |
210 | { HSUSB0_DIR, MUXMODE0, PULL_DISABLED, INPUT },\r |
211 | { HSUSB0_NXT, MUXMODE0, PULL_DISABLED, INPUT },\r |
212 | { HSUSB0_DATA0, MUXMODE0, PULL_DISABLED, INPUT },\r |
213 | { HSUSB0_DATA1, MUXMODE0, PULL_DISABLED, INPUT },\r |
214 | { HSUSB0_DATA2, MUXMODE0, PULL_DISABLED, INPUT },\r |
215 | { HSUSB0_DATA3, MUXMODE0, PULL_DISABLED, INPUT },\r |
216 | { HSUSB0_DATA4, MUXMODE0, PULL_DISABLED, INPUT },\r |
217 | { HSUSB0_DATA5, MUXMODE0, PULL_DISABLED, INPUT },\r |
218 | { HSUSB0_DATA6, MUXMODE0, PULL_DISABLED, INPUT },\r |
219 | { HSUSB0_DATA7, MUXMODE0, PULL_DISABLED, INPUT },\r |
220 | { I2C1_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
221 | { I2C1_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
222 | { I2C2_SCL, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
223 | { I2C2_SDA, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
224 | { I2C3_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
225 | { I2C3_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
efe5f1a2 |
226 | { HDQ_SIO, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
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227 | { MCSPI1_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
228 | { MCSPI1_SIMO, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
229 | { MCSPI1_SOMI, MUXMODE0, PULL_DISABLED, INPUT },\r |
230 | { MCSPI1_CS0, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
231 | { MCSPI1_CS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },\r |
232 | { MCSPI1_CS2, MUXMODE4, PULL_DISABLED, OUTPUT },\r |
233 | { MCSPI1_CS3, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
234 | { MCSPI2_CLK, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
235 | { MCSPI2_SIMO, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
236 | { MCSPI2_SOMI, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
237 | { MCSPI2_CS0, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
238 | { MCSPI2_CS1, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
239 | { SYS_NIRQ, MUXMODE0, PULL_UP_SELECTED, INPUT },\r |
240 | { SYS_CLKOUT2, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
241 | { ETK_CLK, MUXMODE3, PULL_UP_SELECTED, OUTPUT },\r |
242 | { ETK_CTL, MUXMODE3, PULL_UP_SELECTED, OUTPUT },\r |
243 | { ETK_D0, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
244 | { ETK_D1, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
245 | { ETK_D2, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
246 | { ETK_D3, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
247 | { ETK_D4, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
248 | { ETK_D5, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
249 | { ETK_D6, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
250 | { ETK_D7, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
251 | { ETK_D8, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
252 | { ETK_D9, MUXMODE4, PULL_UP_SELECTED, INPUT },\r |
253 | { ETK_D10, MUXMODE3, PULL_UP_SELECTED, OUTPUT },\r |
254 | { ETK_D11, MUXMODE3, PULL_UP_SELECTED, OUTPUT },\r |
255 | { ETK_D12, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
256 | { ETK_D13, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
257 | { ETK_D14, MUXMODE3, PULL_UP_SELECTED, INPUT },\r |
258 | { ETK_D15, MUXMODE3, PULL_UP_SELECTED, INPUT }\r |
259 | };\r |
260 | \r |
efe5f1a2 |
261 | PAD_CONFIGURATION PadConfigurationTableAbc[] = {\r |
262 | { DSS_DATA18, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
263 | { DSS_DATA19, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
264 | { DSS_DATA20, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
265 | { DSS_DATA21, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
266 | { DSS_DATA22, MUXMODE0, PULL_DISABLED, OUTPUT },\r |
267 | { DSS_DATA23, MUXMODE0, PULL_DISABLED, OUTPUT }\r |
268 | };\r |
269 | \r |
270 | PAD_CONFIGURATION PadConfigurationTableXm[] = {\r |
271 | { DSS_DATA18, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
272 | { DSS_DATA19, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
273 | { DSS_DATA20, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
274 | { DSS_DATA21, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
275 | { DSS_DATA22, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
276 | { DSS_DATA23, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
277 | { SYS_BOOT0, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
278 | { SYS_BOOT1, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
279 | { SYS_BOOT3, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
280 | { SYS_BOOT4, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
281 | { SYS_BOOT5, MUXMODE3, PULL_DISABLED, OUTPUT },\r |
282 | { SYS_BOOT6, MUXMODE3, PULL_DISABLED, OUTPUT }\r |
283 | };\r |
284 | \r |
7f21c4a2 |
285 | VOID\r |
286 | PadConfiguration (\r |
efe5f1a2 |
287 | BEAGLEBOARD_REVISION Revision\r |
7f21c4a2 |
288 | )\r |
289 | {\r |
efe5f1a2 |
290 | UINTN Index;\r |
291 | UINT16 PadConfiguration;\r |
292 | PAD_CONFIGURATION *BoardConfiguration;\r |
293 | UINTN NumPinsToConfigure;\r |
294 | \r |
295 | for (Index = 0; Index < NUM_PINS_SHARED; Index++) {\r |
296 | // Set up Pad configuration for particular pin.\r |
297 | PadConfiguration = (PadConfigurationTableShared[Index].MuxMode << MUXMODE_OFFSET);\r |
298 | PadConfiguration |= (PadConfigurationTableShared[Index].PullConfig << PULL_CONFIG_OFFSET);\r |
299 | PadConfiguration |= (PadConfigurationTableShared[Index].InputEnable << INPUTENABLE_OFFSET);\r |
300 | \r |
301 | // Configure the pin with specific Pad configuration.\r |
302 | MmioWrite16(PadConfigurationTableShared[Index].Pin, PadConfiguration);\r |
303 | }\r |
304 | \r |
305 | if (Revision == REVISION_XM) {\r |
306 | BoardConfiguration = PadConfigurationTableXm;\r |
307 | NumPinsToConfigure = NUM_PINS_XM;\r |
308 | } else {\r |
309 | BoardConfiguration = PadConfigurationTableAbc;\r |
310 | NumPinsToConfigure = NUM_PINS_ABC;\r |
311 | }\r |
7f21c4a2 |
312 | \r |
313 | for (Index = 0; Index < NumPinsToConfigure; Index++) {\r |
314 | //Set up Pad configuration for particular pin.\r |
efe5f1a2 |
315 | PadConfiguration = (BoardConfiguration[Index].MuxMode << MUXMODE_OFFSET);\r |
316 | PadConfiguration |= (BoardConfiguration[Index].PullConfig << PULL_CONFIG_OFFSET);\r |
317 | PadConfiguration |= (BoardConfiguration[Index].InputEnable << INPUTENABLE_OFFSET);\r |
7f21c4a2 |
318 | \r |
319 | //Configure the pin with specific Pad configuration.\r |
efe5f1a2 |
320 | MmioWrite16(BoardConfiguration[Index].Pin, PadConfiguration);\r |
7f21c4a2 |
321 | }\r |
322 | }\r |