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1/** @file\r
2*\r
3* Copyright (c) 2011-2017, ARM Limited. All rights reserved.\r
4* Copyright (c) 2017, Linaro, Ltd. All rights reserved.\r
5*\r
a1594be9 6* SPDX-License-Identifier: BSD-2-Clause-Patent\r
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7*\r
8**/\r
9\r
10#include <PiPei.h>\r
11\r
12#include <Library/DebugAgentLib.h>\r
13#include <Library/PrePiLib.h>\r
14#include <Library/PrintLib.h>\r
15#include <Library/PeCoffGetEntryPointLib.h>\r
16#include <Library/PrePiHobListPointerLib.h>\r
17#include <Library/TimerLib.h>\r
18#include <Library/PerformanceLib.h>\r
19\r
20#include <Ppi/GuidedSectionExtraction.h>\r
21#include <Ppi/ArmMpCoreInfo.h>\r
22#include <Ppi/SecPerformance.h>\r
23#include <Guid/LzmaDecompress.h>\r
24\r
25#include "PrePi.h"\r
26#include "LzmaDecompress.h"\r
27\r
28#define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) || \\r
29 ((FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet64 (PcdSystemMemoryBase)))\r
30\r
31UINT64 mSystemMemoryEnd = FixedPcdGet64(PcdSystemMemoryBase) +\r
32 FixedPcdGet64(PcdSystemMemorySize) - 1;\r
33\r
34EFI_STATUS\r
35GetPlatformPpi (\r
36 IN EFI_GUID *PpiGuid,\r
37 OUT VOID **Ppi\r
38 )\r
39{\r
40 UINTN PpiListSize;\r
41 UINTN PpiListCount;\r
42 EFI_PEI_PPI_DESCRIPTOR *PpiList;\r
43 UINTN Index;\r
44\r
45 PpiListSize = 0;\r
46 ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r
47 PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r
48 for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r
49 if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {\r
50 *Ppi = PpiList->Ppi;\r
51 return EFI_SUCCESS;\r
52 }\r
53 }\r
54\r
55 return EFI_NOT_FOUND;\r
56}\r
57\r
58VOID\r
59PrePiMain (\r
60 IN UINTN UefiMemoryBase,\r
61 IN UINTN StacksBase,\r
62 IN UINT64 StartTimeStamp\r
63 )\r
64{\r
65 EFI_HOB_HANDOFF_INFO_TABLE* HobList;\r
66 EFI_STATUS Status;\r
67 CHAR8 Buffer[100];\r
68 UINTN CharCount;\r
69 UINTN StacksSize;\r
70 FIRMWARE_SEC_PERFORMANCE Performance;\r
71\r
72 // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)\r
73 ASSERT (IS_XIP() ||\r
74 ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&\r
75 ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd)));\r
76\r
77 // Initialize the architecture specific bits\r
78 ArchInitialize ();\r
79\r
80 // Initialize the Serial Port\r
81 SerialPortInitialize ();\r
82 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",\r
83 (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);\r
84 SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
85\r
86 // Initialize the Debug Agent for Source Level Debugging\r
87 InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
88 SaveAndSetDebugTimerInterrupt (TRUE);\r
89\r
90 // Declare the PI/UEFI memory region\r
91 HobList = HobConstructor (\r
92 (VOID*)UefiMemoryBase,\r
93 FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),\r
94 (VOID*)UefiMemoryBase,\r
95 (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks\r
96 );\r
97 PrePeiSetHobList (HobList);\r
98\r
99 // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)\r
100 Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));\r
101 ASSERT_EFI_ERROR (Status);\r
102\r
103 StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r
104 BuildStackHob (StacksBase, StacksSize);\r
105\r
106 //TODO: Call CpuPei as a library\r
32f79df3 107 BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));\r
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108\r
109 // Store timer value logged at the beginning of firmware image execution\r
110 Performance.ResetEnd = GetTimeInNanoSecond (StartTimeStamp);\r
111\r
112 // Build SEC Performance Data Hob\r
113 BuildGuidDataHob (&gEfiFirmwarePerformanceGuid, &Performance, sizeof (Performance));\r
114\r
115 // Set the Boot Mode\r
116 SetBootMode (ArmPlatformGetBootMode ());\r
117\r
118 // Initialize Platform HOBs (CpuHob and FvHob)\r
119 Status = PlatformPeim ();\r
120 ASSERT_EFI_ERROR (Status);\r
121\r
122 // Now, the HOB List has been initialized, we can register performance information\r
123 PERF_START (NULL, "PEI", NULL, StartTimeStamp);\r
124\r
125 // SEC phase needs to run library constructors by hand.\r
126 ProcessLibraryConstructorList ();\r
127\r
128 // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r
129 BuildPeCoffLoaderHob ();\r
130 BuildExtractSectionHob (\r
131 &gLzmaCustomDecompressGuid,\r
132 LzmaGuidedSectionGetInfo,\r
133 LzmaGuidedSectionExtraction\r
134 );\r
135\r
136 // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r
137 Status = DecompressFirstFv ();\r
138 ASSERT_EFI_ERROR (Status);\r
139\r
140 // Load the DXE Core and transfer control to it\r
141 Status = LoadDxeCoreFromFv (NULL, 0);\r
142 ASSERT_EFI_ERROR (Status);\r
143}\r
144\r
145VOID\r
146CEntryPoint (\r
147 IN UINTN MpId,\r
148 IN UINTN UefiMemoryBase,\r
149 IN UINTN StacksBase\r
150 )\r
151{\r
152 UINT64 StartTimeStamp;\r
153\r
154 // Initialize the platform specific controllers\r
155 ArmPlatformInitialize (MpId);\r
156\r
157 if (PerformanceMeasurementEnabled ()) {\r
158 // Initialize the Timer Library to setup the Timer HW controller\r
159 TimerConstructor ();\r
160 // We cannot call yet the PerformanceLib because the HOB List has not been initialized\r
161 StartTimeStamp = GetPerformanceCounter ();\r
162 } else {\r
163 StartTimeStamp = 0;\r
164 }\r
165\r
166 // Data Cache enabled on Primary core when MMU is enabled.\r
167 ArmDisableDataCache ();\r
168 // Invalidate Data cache\r
169 ArmInvalidateDataCache ();\r
170 // Invalidate instruction cache\r
171 ArmInvalidateInstructionCache ();\r
172 // Enable Instruction Caches on all cores.\r
173 ArmEnableInstructionCache ();\r
174\r
175 PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);\r
176\r
177 // DXE Core should always load and never return\r
178 ASSERT (FALSE);\r
179}\r